mvebu arm for 4.19 (part 1)
- remove potential call from invalid context in boot_secondary - allow using CONFIG_FORTIFY_SOURCE in pmsu.c -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW09bLwAKCRALBhiOFHI7 1SIJAJ9VODAIlUU46uOxaQOD1i+RNRRA2gCbBF+P1oRU8OZllnfVwBhgQS0hY/4= =6j8Z -----END PGP SIGNATURE----- Merge tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu into next/soc mvebu arm for 4.19 (part 1) - remove potential call from invalid context in boot_secondary - allow using CONFIG_FORTIFY_SOURCE in pmsu.c * tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu: ARM: mvebu: convert secondary CPU clock sync to hotplug state ARM: mvebu: declare asm symbols as character arrays in pmsu.c Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
07167d8a4e
@ -35,6 +35,8 @@
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#define AXP_BOOTROM_BASE 0xfff00000
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#define AXP_BOOTROM_SIZE 0x100000
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static struct clk *boot_cpu_clk;
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static struct clk *get_cpu_clk(int cpu)
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{
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struct clk *cpu_clk;
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@ -48,30 +50,6 @@ static struct clk *get_cpu_clk(int cpu)
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return cpu_clk;
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}
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static void set_secondary_cpu_clock(unsigned int cpu)
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{
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int thiscpu;
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unsigned long rate;
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struct clk *cpu_clk;
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thiscpu = get_cpu();
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cpu_clk = get_cpu_clk(thiscpu);
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if (!cpu_clk)
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goto out;
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clk_prepare_enable(cpu_clk);
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rate = clk_get_rate(cpu_clk);
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cpu_clk = get_cpu_clk(cpu);
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if (!cpu_clk)
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goto out;
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clk_set_rate(cpu_clk, rate);
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clk_prepare_enable(cpu_clk);
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out:
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put_cpu();
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}
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static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int ret, hw_cpu;
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@ -79,7 +57,6 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
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pr_info("Booting CPU %d\n", cpu);
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hw_cpu = cpu_logical_map(cpu);
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set_secondary_cpu_clock(hw_cpu);
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mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
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/*
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@ -122,6 +99,19 @@ static void __init armada_xp_smp_init_cpus(void)
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panic("Invalid number of CPUs in DT\n");
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}
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static int armada_xp_sync_secondary_clk(unsigned int cpu)
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{
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struct clk *cpu_clk = get_cpu_clk(cpu);
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if (!cpu_clk || !boot_cpu_clk)
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return 0;
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clk_prepare_enable(cpu_clk);
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clk_set_rate(cpu_clk, clk_get_rate(boot_cpu_clk));
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return 0;
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}
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static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *node;
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@ -131,6 +121,14 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
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flush_cache_all();
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set_cpu_coherent();
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boot_cpu_clk = get_cpu_clk(smp_processor_id());
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if (boot_cpu_clk) {
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clk_prepare_enable(boot_cpu_clk);
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cpuhp_setup_state_nocalls(CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS,
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"arm/mvebu/sync_clocks:online",
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armada_xp_sync_secondary_clk, NULL);
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}
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/*
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* In order to boot the secondary CPUs we need to ensure
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* the bootROM is mapped at the correct address.
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@ -223,7 +221,6 @@ static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle)
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int ret, hw_cpu;
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hw_cpu = cpu_logical_map(cpu);
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set_secondary_cpu_clock(hw_cpu);
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mv98dx3236_resume_set_cpu_boot_addr(hw_cpu,
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armada_xp_secondary_startup);
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@ -116,8 +116,8 @@ void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
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PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
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}
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extern unsigned char mvebu_boot_wa_start;
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extern unsigned char mvebu_boot_wa_end;
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extern unsigned char mvebu_boot_wa_start[];
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extern unsigned char mvebu_boot_wa_end[];
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/*
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* This function sets up the boot address workaround needed for SMP
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@ -130,7 +130,7 @@ int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
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phys_addr_t resume_addr_reg)
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{
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void __iomem *sram_virt_base;
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u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start;
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u32 code_len = mvebu_boot_wa_end - mvebu_boot_wa_start;
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mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE);
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mvebu_mbus_add_window_by_id(crypto_eng_target, crypto_eng_attribute,
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@ -143,6 +143,7 @@ enum cpuhp_state {
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CPUHP_AP_SMPBOOT_THREADS,
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CPUHP_AP_X86_VDSO_VMA_ONLINE,
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CPUHP_AP_IRQ_AFFINITY_ONLINE,
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CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS,
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CPUHP_AP_PERF_ONLINE,
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CPUHP_AP_PERF_X86_ONLINE,
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CPUHP_AP_PERF_X86_UNCORE_ONLINE,
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