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crypto: caam/qi2 - fix zero-length buffer DMA mapping

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Commit 04e6d25c5bb2 ("crypto: caam - fix zero-length buffer DMA mapping")
fixed an issue in caam/jr driver where ahash implementation was
DMA mapping a zero-length buffer.

Current commit applies a similar fix for caam/qi2 driver.

Cc: <stable@vger.kernel.org> # v4.20+
Fixes: 3f16f6c9d632 ("crypto: caam/qi2 - add support for ahash algorithms")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Horia Geantă 2019-04-25 17:52:21 +03:00 committed by Herbert Xu
parent 5f49f18d27
commit 07586d3ddf
1 changed files with 18 additions and 7 deletions
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25
drivers/crypto/caam/caamalg_qi2.c
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@ -3795,10 +3795,13 @@ static int ahash_final_no_ctx(struct ahash_request *req)
if (!edesc) if (!edesc)
return ret; return ret;
state->buf_dma = dma_map_single(ctx->dev, buf, buflen, DMA_TO_DEVICE); if (buflen) {
if (dma_mapping_error(ctx->dev, state->buf_dma)) { state->buf_dma = dma_map_single(ctx->dev, buf, buflen,
dev_err(ctx->dev, "unable to map src\n"); DMA_TO_DEVICE);
goto unmap; if (dma_mapping_error(ctx->dev, state->buf_dma)) {
dev_err(ctx->dev, "unable to map src\n");
goto unmap;
}
} }
edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize,
@ -3811,9 +3814,17 @@ static int ahash_final_no_ctx(struct ahash_request *req)
memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt));
dpaa2_fl_set_final(in_fle, true); dpaa2_fl_set_final(in_fle, true);
dpaa2_fl_set_format(in_fle, dpaa2_fl_single); /*
dpaa2_fl_set_addr(in_fle, state->buf_dma); * crypto engine requires the input entry to be present when
dpaa2_fl_set_len(in_fle, buflen); * "frame list" FD is used.
* Since engine does not support FMT=2'b11 (unused entry type), leaving
* in_fle zeroized (except for "Final" flag) is the best option.
*/
if (buflen) {
dpaa2_fl_set_format(in_fle, dpaa2_fl_single);
dpaa2_fl_set_addr(in_fle, state->buf_dma);
dpaa2_fl_set_len(in_fle, buflen);
}
dpaa2_fl_set_format(out_fle, dpaa2_fl_single); dpaa2_fl_set_format(out_fle, dpaa2_fl_single);
dpaa2_fl_set_addr(out_fle, edesc->dst_dma); dpaa2_fl_set_addr(out_fle, edesc->dst_dma);
dpaa2_fl_set_len(out_fle, digestsize); dpaa2_fl_set_len(out_fle, digestsize);