irqchip/loongson-liointc: Add ACPI init support
LIOINTC stands for "Legacy I/O Interrupts" that described in Section 11.1 of "Loongson 3A5000 Processor Reference Manual". For more information please refer Documentation/loongarch/irq-chip-model.rst. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1658314292-35346-11-git-send-email-lvjianmin@loongson.cn
This commit is contained in:
Huacai Chen
Marc Zyngier
parent
0230873240
commit
0858ed035a
@ -105,7 +105,7 @@ struct acpi_madt_lpc_pic;
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struct irq_domain *loongarch_cpu_irq_init(void);
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struct irq_domain *liointc_acpi_init(struct irq_domain *parent,
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int liointc_acpi_init(struct irq_domain *parent,
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struct acpi_madt_lio_pic *acpi_liointc);
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struct irq_domain *eiointc_acpi_init(struct irq_domain *parent,
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struct acpi_madt_eio_pic *acpi_eiointc);
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@ -138,7 +138,7 @@ extern struct acpi_madt_msi_pic *acpi_pchmsi[MAX_IO_PICS];
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extern struct acpi_madt_bio_pic *acpi_pchpic[MAX_IO_PICS];
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extern struct irq_domain *cpu_domain;
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extern struct irq_domain *liointc_domain;
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extern struct fwnode_handle *liointc_handle;
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extern struct fwnode_handle *pch_lpc_handle;
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extern struct fwnode_handle *pch_pic_handle[MAX_IO_PICS];
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@ -26,7 +26,6 @@ DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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EXPORT_PER_CPU_SYMBOL(irq_stat);
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struct irq_domain *cpu_domain;
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struct irq_domain *liointc_domain;
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struct acpi_vector_group pch_group[MAX_IO_PICS];
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struct acpi_vector_group msi_group[MAX_IO_PICS];
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@ -9,6 +9,7 @@
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#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256)
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#define MAX_IO_PICS 1
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#define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY
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#define GSI_MIN_CPU_IRQ 0
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#include <asm/mach-generic/irq.h>
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@ -23,7 +23,7 @@
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#endif
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#define LIOINTC_CHIP_IRQ 32
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#define LIOINTC_NUM_PARENT 4
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#define LIOINTC_NUM_PARENT 4
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#define LIOINTC_NUM_CORES 4
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#define LIOINTC_INTC_CHIP_START 0x20
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@ -58,6 +58,8 @@ struct liointc_priv {
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bool has_lpc_irq_errata;
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};
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struct fwnode_handle *liointc_handle;
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static void liointc_chained_handle_irq(struct irq_desc *desc)
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{
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struct liointc_handler_data *handler = irq_desc_get_handler_data(desc);
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@ -153,97 +155,79 @@ static void liointc_resume(struct irq_chip_generic *gc)
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irq_gc_unlock_irqrestore(gc, flags);
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}
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static const char * const parent_names[] = {"int0", "int1", "int2", "int3"};
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static const char * const core_reg_names[] = {"isr0", "isr1", "isr2", "isr3"};
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static int parent_irq[LIOINTC_NUM_PARENT];
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static u32 parent_int_map[LIOINTC_NUM_PARENT];
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static const char *const parent_names[] = {"int0", "int1", "int2", "int3"};
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static const char *const core_reg_names[] = {"isr0", "isr1", "isr2", "isr3"};
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static void __iomem *liointc_get_reg_byname(struct device_node *node,
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const char *name)
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static int liointc_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type)
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{
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int index = of_property_match_string(node, "reg-names", name);
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if (index < 0)
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return NULL;
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return of_iomap(node, index);
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if (WARN_ON(intsize < 1))
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return -EINVAL;
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*out_hwirq = intspec[0] - GSI_MIN_CPU_IRQ;
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*out_type = IRQ_TYPE_NONE;
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return 0;
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}
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static int __init liointc_of_init(struct device_node *node,
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struct device_node *parent)
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static const struct irq_domain_ops acpi_irq_gc_ops = {
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.map = irq_map_generic_chip,
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.unmap = irq_unmap_generic_chip,
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.xlate = liointc_domain_xlate,
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};
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static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
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struct fwnode_handle *domain_handle, struct device_node *node)
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{
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int i, err;
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void __iomem *base;
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struct irq_chip_type *ct;
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struct irq_chip_generic *gc;
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struct irq_domain *domain;
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struct irq_chip_type *ct;
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struct liointc_priv *priv;
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void __iomem *base;
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u32 of_parent_int_map[LIOINTC_NUM_PARENT];
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int parent_irq[LIOINTC_NUM_PARENT];
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bool have_parent = FALSE;
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int sz, i, err = 0;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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if (of_device_is_compatible(node, "loongson,liointc-2.0")) {
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base = liointc_get_reg_byname(node, "main");
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if (!base) {
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err = -ENODEV;
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goto out_free_priv;
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}
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base = ioremap(addr, size);
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if (!base)
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goto out_free_priv;
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for (i = 0; i < LIOINTC_NUM_CORES; i++)
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priv->core_isr[i] = liointc_get_reg_byname(node, core_reg_names[i]);
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if (!priv->core_isr[0]) {
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err = -ENODEV;
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goto out_iounmap_base;
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}
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} else {
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base = of_iomap(node, 0);
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if (!base) {
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err = -ENODEV;
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goto out_free_priv;
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}
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for (i = 0; i < LIOINTC_NUM_CORES; i++)
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priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS;
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}
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for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
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parent_irq[i] = of_irq_get_byname(node, parent_names[i]);
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if (parent_irq[i] > 0)
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have_parent = TRUE;
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}
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if (!have_parent) {
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err = -ENODEV;
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goto out_iounmap_isr;
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}
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sz = of_property_read_variable_u32_array(node,
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"loongson,parent_int_map",
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&of_parent_int_map[0],
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LIOINTC_NUM_PARENT,
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LIOINTC_NUM_PARENT);
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if (sz < 4) {
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pr_err("loongson-liointc: No parent_int_map\n");
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err = -ENODEV;
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goto out_iounmap_isr;
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}
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for (i = 0; i < LIOINTC_NUM_CORES; i++)
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priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS;
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for (i = 0; i < LIOINTC_NUM_PARENT; i++)
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priv->handler[i].parent_int_map = of_parent_int_map[i];
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priv->handler[i].parent_int_map = parent_int_map[i];
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if (revision > 1) {
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for (i = 0; i < LIOINTC_NUM_CORES; i++) {
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int index = of_property_match_string(node,
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"reg-names", core_reg_names[i]);
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if (index < 0)
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return -EINVAL;
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priv->core_isr[i] = of_iomap(node, index);
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}
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}
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/* Setup IRQ domain */
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domain = irq_domain_add_linear(node, 32,
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if (!acpi_disabled)
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domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
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&acpi_irq_gc_ops, priv);
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else
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domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
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&irq_generic_chip_ops, priv);
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if (!domain) {
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pr_err("loongson-liointc: cannot add IRQ domain\n");
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err = -EINVAL;
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goto out_iounmap_isr;
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goto out_iounmap;
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}
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err = irq_alloc_domain_generic_chips(domain, 32, 1,
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node->full_name, handle_level_irq,
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IRQ_NOPROBE, 0, 0);
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err = irq_alloc_domain_generic_chips(domain, LIOINTC_CHIP_IRQ, 1,
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(node ? node->full_name : "LIOINTC"),
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handle_level_irq, 0, IRQ_NOPROBE, 0);
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if (err) {
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pr_err("loongson-liointc: unable to register IRQ domain\n");
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goto out_free_domain;
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@ -299,24 +283,93 @@ static int __init liointc_of_init(struct device_node *node,
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liointc_chained_handle_irq, &priv->handler[i]);
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}
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liointc_handle = domain_handle;
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return 0;
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out_free_domain:
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irq_domain_remove(domain);
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out_iounmap_isr:
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for (i = 0; i < LIOINTC_NUM_CORES; i++) {
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if (!priv->core_isr[i])
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continue;
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iounmap(priv->core_isr[i]);
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}
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out_iounmap_base:
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out_iounmap:
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iounmap(base);
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out_free_priv:
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kfree(priv);
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return err;
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return -EINVAL;
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}
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#ifdef CONFIG_OF
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static int __init liointc_of_init(struct device_node *node,
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struct device_node *parent)
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{
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bool have_parent = FALSE;
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int sz, i, index, revision, err = 0;
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struct resource res;
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if (!of_device_is_compatible(node, "loongson,liointc-2.0")) {
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index = 0;
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revision = 1;
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} else {
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index = of_property_match_string(node, "reg-names", "main");
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revision = 2;
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}
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if (of_address_to_resource(node, index, &res))
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return -EINVAL;
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for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
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parent_irq[i] = of_irq_get_byname(node, parent_names[i]);
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if (parent_irq[i] > 0)
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have_parent = TRUE;
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}
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if (!have_parent)
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return -ENODEV;
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sz = of_property_read_variable_u32_array(node,
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"loongson,parent_int_map",
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&parent_int_map[0],
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LIOINTC_NUM_PARENT,
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LIOINTC_NUM_PARENT);
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if (sz < 4) {
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pr_err("loongson-liointc: No parent_int_map\n");
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return -ENODEV;
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}
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err = liointc_init(res.start, resource_size(&res),
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revision, of_node_to_fwnode(node), node);
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if (err < 0)
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return err;
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return 0;
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}
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IRQCHIP_DECLARE(loongson_liointc_1_0, "loongson,liointc-1.0", liointc_of_init);
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IRQCHIP_DECLARE(loongson_liointc_1_0a, "loongson,liointc-1.0a", liointc_of_init);
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IRQCHIP_DECLARE(loongson_liointc_2_0, "loongson,liointc-2.0", liointc_of_init);
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#endif
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#ifdef CONFIG_ACPI
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int __init liointc_acpi_init(struct irq_domain *parent, struct acpi_madt_lio_pic *acpi_liointc)
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{
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int ret;
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struct fwnode_handle *domain_handle;
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parent_int_map[0] = acpi_liointc->cascade_map[0];
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parent_int_map[1] = acpi_liointc->cascade_map[1];
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parent_irq[0] = irq_create_mapping(parent, acpi_liointc->cascade[0]);
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parent_irq[1] = irq_create_mapping(parent, acpi_liointc->cascade[1]);
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domain_handle = irq_domain_alloc_fwnode((phys_addr_t *)acpi_liointc);
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if (!domain_handle) {
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pr_err("Unable to allocate domain handle\n");
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return -ENOMEM;
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}
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ret = liointc_init(acpi_liointc->address, acpi_liointc->size,
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1, domain_handle, NULL);
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if (ret)
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irq_domain_free_fwnode(domain_handle);
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return ret;
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}
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#endif
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