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ARM: dts: Add PCIe support for Airoha EN7523

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This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is nearly
identical to the one in MT7622

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220615125335.96089-3-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Felix Fietkau 2022-06-15 14:53:35 +02:00 committed by Matthias Brugger
parent e0c5341acd
commit 08a4aeb2c2
2 changed files with 66 additions and 0 deletions
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8
arch/arm/boot/dts/en7523-evb.dts
View File

@ -33,3 +33,11 @@
&gpio1 {
status = "okay";
};
&pcie0 {
status = "okay";
};
&pcie1 {
status = "okay";
};

58
arch/arm/boot/dts/en7523.dtsi
View File

@ -143,4 +143,62 @@
gpio-controller;
#gpio-cells = <2>;
};
pcie0: pcie@1fa91000 {
compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
device_type = "pci";
reg = <0x1fa91000 0x1000>;
reg-names = "port0";
linux,pci-domain = <0>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pcie_irq";
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck0";
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
<0 0 0 3 &pcie_intc0 2>,
<0 0 0 4 &pcie_intc0 3>;
pcie_intc0: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
pcie1: pcie@1fa92000 {
compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
device_type = "pci";
reg = <0x1fa92000 0x1000>;
reg-names = "port1";
linux,pci-domain = <1>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pcie_irq";
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck1";
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>;
status = "disabled";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
<0 0 0 3 &pcie_intc1 2>,
<0 0 0 4 &pcie_intc1 3>;
pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
};