hwmon: Add support for SPD5118 compliant temperature sensors
Add support for SPD5118 (Jedec JESD300) compliant temperature sensors. Such sensors are typically found on DDR5 memory modules. Cc: René Rebe <rene@exactcode.de> Cc: Thomas Weißschuh <linux@weissschuh.net> Reviewed-by: Thomas Weißschuh <linux@weissschuh.net> Tested-by: Thomas Weißschuh <linux@weissschuh.net> Tested-by: Stephen Horvath <s.horvath@outlook.com.au> Tested-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck
parent
f3edbbd70b
commit
09262e9814
@ -215,6 +215,7 @@ Hardware Monitoring Kernel Drivers
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smsc47m192
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smsc47m1
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sparx5-temp
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spd5118
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stpddc60
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surface_fan
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sy7636a-hwmon
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55
Documentation/hwmon/spd5118.rst
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55
Documentation/hwmon/spd5118.rst
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@ -0,0 +1,55 @@
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.. SPDX-License-Identifier: GPL-2.0-or-later
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Kernel driver spd5118
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=====================
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Supported chips:
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* SPD5118 (JEDEC JESD300) compliant temperature sensor chips
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JEDEC standard download:
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https://www.jedec.org/standards-documents/docs/jesd300-5b01
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(account required)
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Prefix: 'spd5118'
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Addresses scanned: I2C 0x50 - 0x57
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Author:
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Guenter Roeck <linux@roeck-us.net>
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Description
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-----------
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This driver implements support for SPD5118 (JEDEC JESD300) compliant temperature
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sensors, which are used on many DDR5 memory modules. Some systems use the sensor
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to prevent memory overheating by automatically throttling the memory controller.
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The driver auto-detects SPD5118 compliant chips, but can also be instantiated
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using devicetree/firmware nodes.
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A SPD5118 compliant chip supports a single temperature sensor. Critical minimum,
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minimum, maximum, and critical temperature can be configured. There are alarms
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for low critical, low, high, and critical thresholds.
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Hardware monitoring sysfs entries
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---------------------------------
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======================= ==================================
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temp1_input Temperature (RO)
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temp1_lcrit Low critical high temperature (RW)
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temp1_min Minimum temperature (RW)
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temp1_max Maximum temperature (RW)
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temp1_crit Critical high temperature (RW)
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temp1_lcrit_alarm Temperature low critical alarm
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temp1_min_alarm Temperature low alarm
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temp1_max_alarm Temperature high alarm
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temp1_crit_alarm Temperature critical alarm
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======================= ==================================
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Alarm attributes are sticky until read and will be cleared afterwards
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unless the alarm condition still applies.
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@ -2181,6 +2181,18 @@ config SENSORS_INA3221
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This driver can also be built as a module. If so, the module
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will be called ina3221.
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config SENSORS_SPD5118
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tristate "SPD5118 Compliant Temperature Sensors"
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depends on I2C
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select REGMAP_I2C
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help
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If you say yes here you get support for SPD5118 (JEDEC JESD300)
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compliant temperature sensors. Such sensors are found on DDR5 memory
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modules.
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This driver can also be built as a module. If so, the module
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will be called spd5118.
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config SENSORS_TC74
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tristate "Microchip TC74"
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depends on I2C
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@ -207,6 +207,7 @@ obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o
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obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o
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obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
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obj-$(CONFIG_SENSORS_SPARX5) += sparx5-temp.o
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obj-$(CONFIG_SENSORS_SPD5118) += spd5118.o
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obj-$(CONFIG_SENSORS_STTS751) += stts751.o
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obj-$(CONFIG_SENSORS_SURFACE_FAN)+= surface_fan.o
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obj-$(CONFIG_SENSORS_SY7636A) += sy7636a-hwmon.o
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481
drivers/hwmon/spd5118.c
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481
drivers/hwmon/spd5118.c
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@ -0,0 +1,481 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Jedec 5118 compliant temperature sensors
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*
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* Derived from https://github.com/Steve-Tech/SPD5118-DKMS
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* Originally from T/2 driver at https://t2sde.org/packages/linux
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* Copyright (c) 2023 René Rebe, ExactCODE GmbH; Germany.
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*
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* Copyright (c) 2024 Guenter Roeck
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*
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* Inspired by ee1004.c and jc42.c.
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*
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* SPD5118 compliant temperature sensors are typically used on DDR5
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* memory modules.
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*/
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#include <linux/bitops.h>
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/hwmon.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/units.h>
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/* Addresses to scan */
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static const unsigned short normal_i2c[] = {
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0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, I2C_CLIENT_END };
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/* SPD5118 registers. */
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#define SPD5118_REG_TYPE 0x00 /* MR0:MR1 */
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#define SPD5118_REG_REVISION 0x02 /* MR2 */
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#define SPD5118_REG_VENDOR 0x03 /* MR3:MR4 */
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#define SPD5118_REG_CAPABILITY 0x05 /* MR5 */
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#define SPD5118_REG_I2C_LEGACY_MODE 0x0B /* MR11 */
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#define SPD5118_REG_TEMP_CLR 0x13 /* MR19 */
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#define SPD5118_REG_ERROR_CLR 0x14 /* MR20 */
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#define SPD5118_REG_TEMP_CONFIG 0x1A /* MR26 */
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#define SPD5118_REG_TEMP_MAX 0x1c /* MR28:MR29 */
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#define SPD5118_REG_TEMP_MIN 0x1e /* MR30:MR31 */
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#define SPD5118_REG_TEMP_CRIT 0x20 /* MR32:MR33 */
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#define SPD5118_REG_TEMP_LCRIT 0x22 /* MR34:MR35 */
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#define SPD5118_REG_TEMP 0x31 /* MR49:MR50 */
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#define SPD5118_REG_TEMP_STATUS 0x33 /* MR51 */
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#define SPD5118_TEMP_STATUS_HIGH BIT(0)
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#define SPD5118_TEMP_STATUS_LOW BIT(1)
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#define SPD5118_TEMP_STATUS_CRIT BIT(2)
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#define SPD5118_TEMP_STATUS_LCRIT BIT(3)
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#define SPD5118_CAP_TS_SUPPORT BIT(1) /* temperature sensor support */
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#define SPD5118_TS_DISABLE BIT(0) /* temperature sensor disable */
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/* Temperature unit in millicelsius */
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#define SPD5118_TEMP_UNIT (MILLIDEGREE_PER_DEGREE / 4)
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/* Representable temperature range in millicelsius */
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#define SPD5118_TEMP_RANGE_MIN -256000
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#define SPD5118_TEMP_RANGE_MAX 255750
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static int spd5118_temp_from_reg(u16 reg)
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{
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int temp = sign_extend32(reg >> 2, 10);
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return temp * SPD5118_TEMP_UNIT;
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}
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static u16 spd5118_temp_to_reg(long temp)
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{
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temp = clamp_val(temp, SPD5118_TEMP_RANGE_MIN, SPD5118_TEMP_RANGE_MAX);
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return (DIV_ROUND_CLOSEST(temp, SPD5118_TEMP_UNIT) & 0x7ff) << 2;
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}
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static int spd5118_read_temp(struct regmap *regmap, u32 attr, long *val)
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{
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int reg, err;
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u8 regval[2];
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u16 temp;
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switch (attr) {
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case hwmon_temp_input:
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reg = SPD5118_REG_TEMP;
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break;
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case hwmon_temp_max:
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reg = SPD5118_REG_TEMP_MAX;
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break;
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case hwmon_temp_min:
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reg = SPD5118_REG_TEMP_MIN;
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break;
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case hwmon_temp_crit:
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reg = SPD5118_REG_TEMP_CRIT;
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break;
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case hwmon_temp_lcrit:
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reg = SPD5118_REG_TEMP_LCRIT;
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break;
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default:
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return -EOPNOTSUPP;
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}
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err = regmap_bulk_read(regmap, reg, regval, 2);
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if (err)
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return err;
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temp = (regval[1] << 8) | regval[0];
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*val = spd5118_temp_from_reg(temp);
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return 0;
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}
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static int spd5118_read_alarm(struct regmap *regmap, u32 attr, long *val)
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{
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unsigned int mask, regval;
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int err;
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switch (attr) {
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case hwmon_temp_max_alarm:
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mask = SPD5118_TEMP_STATUS_HIGH;
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break;
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case hwmon_temp_min_alarm:
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mask = SPD5118_TEMP_STATUS_LOW;
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break;
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case hwmon_temp_crit_alarm:
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mask = SPD5118_TEMP_STATUS_CRIT;
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break;
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case hwmon_temp_lcrit_alarm:
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mask = SPD5118_TEMP_STATUS_LCRIT;
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break;
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default:
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return -EOPNOTSUPP;
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}
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err = regmap_read(regmap, SPD5118_REG_TEMP_STATUS, ®val);
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if (err < 0)
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return err;
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*val = !!(regval & mask);
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if (*val)
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return regmap_write(regmap, SPD5118_REG_TEMP_CLR, mask);
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return 0;
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}
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static int spd5118_read_enable(struct regmap *regmap, long *val)
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{
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u32 regval;
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int err;
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err = regmap_read(regmap, SPD5118_REG_TEMP_CONFIG, ®val);
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if (err < 0)
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return err;
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*val = !(regval & SPD5118_TS_DISABLE);
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return 0;
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}
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static int spd5118_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct regmap *regmap = dev_get_drvdata(dev);
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if (type != hwmon_temp)
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return -EOPNOTSUPP;
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_max:
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case hwmon_temp_min:
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case hwmon_temp_crit:
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case hwmon_temp_lcrit:
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return spd5118_read_temp(regmap, attr, val);
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case hwmon_temp_max_alarm:
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case hwmon_temp_min_alarm:
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case hwmon_temp_crit_alarm:
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case hwmon_temp_lcrit_alarm:
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return spd5118_read_alarm(regmap, attr, val);
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case hwmon_temp_enable:
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return spd5118_read_enable(regmap, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int spd5118_write_temp(struct regmap *regmap, u32 attr, long val)
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{
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u8 regval[2];
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u16 temp;
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int reg;
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switch (attr) {
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case hwmon_temp_max:
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reg = SPD5118_REG_TEMP_MAX;
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break;
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case hwmon_temp_min:
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reg = SPD5118_REG_TEMP_MIN;
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break;
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case hwmon_temp_crit:
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reg = SPD5118_REG_TEMP_CRIT;
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break;
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case hwmon_temp_lcrit:
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reg = SPD5118_REG_TEMP_LCRIT;
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break;
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default:
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return -EOPNOTSUPP;
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}
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temp = spd5118_temp_to_reg(val);
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regval[0] = temp & 0xff;
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regval[1] = temp >> 8;
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return regmap_bulk_write(regmap, reg, regval, 2);
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}
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static int spd5118_write_enable(struct regmap *regmap, long val)
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{
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if (val && val != 1)
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return -EINVAL;
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return regmap_update_bits(regmap, SPD5118_REG_TEMP_CONFIG,
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SPD5118_TS_DISABLE,
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val ? 0 : SPD5118_TS_DISABLE);
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}
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static int spd5118_temp_write(struct regmap *regmap, u32 attr, long val)
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{
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switch (attr) {
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case hwmon_temp_max:
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case hwmon_temp_min:
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case hwmon_temp_crit:
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case hwmon_temp_lcrit:
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return spd5118_write_temp(regmap, attr, val);
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case hwmon_temp_enable:
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return spd5118_write_enable(regmap, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int spd5118_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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struct regmap *regmap = dev_get_drvdata(dev);
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switch (type) {
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case hwmon_temp:
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return spd5118_temp_write(regmap, attr, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t spd5118_is_visible(const void *_data, enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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if (type != hwmon_temp)
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return 0;
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switch (attr) {
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case hwmon_temp_input:
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return 0444;
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case hwmon_temp_min:
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case hwmon_temp_max:
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case hwmon_temp_lcrit:
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case hwmon_temp_crit:
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case hwmon_temp_enable:
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return 0644;
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case hwmon_temp_min_alarm:
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case hwmon_temp_max_alarm:
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case hwmon_temp_crit_alarm:
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case hwmon_temp_lcrit_alarm:
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return 0444;
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default:
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return 0;
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}
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}
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static inline bool spd5118_parity8(u8 w)
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{
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w ^= w >> 4;
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return (0x6996 >> (w & 0xf)) & 1;
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}
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/*
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* Bank and vendor id are 8-bit fields with seven data bits and odd parity.
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* Vendor IDs 0 and 0x7f are invalid.
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* See Jedec standard JEP106BJ for details and a list of assigned vendor IDs.
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*/
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static bool spd5118_vendor_valid(u8 bank, u8 id)
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{
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if (!spd5118_parity8(bank) || !spd5118_parity8(id))
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return false;
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id &= 0x7f;
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return id && id != 0x7f;
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}
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/* Return 0 if detection is successful, -ENODEV otherwise */
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static int spd5118_detect(struct i2c_client *client, struct i2c_board_info *info)
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{
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struct i2c_adapter *adapter = client->adapter;
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int regval;
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if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_WORD_DATA))
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return -ENODEV;
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regval = i2c_smbus_read_word_swapped(client, SPD5118_REG_TYPE);
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if (regval != 0x5118)
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return -ENODEV;
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regval = i2c_smbus_read_word_data(client, SPD5118_REG_VENDOR);
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if (regval < 0 || !spd5118_vendor_valid(regval & 0xff, regval >> 8))
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return -ENODEV;
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regval = i2c_smbus_read_byte_data(client, SPD5118_REG_CAPABILITY);
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if (regval < 0)
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return -ENODEV;
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if (!(regval & SPD5118_CAP_TS_SUPPORT) || (regval & 0xfc))
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return -ENODEV;
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regval = i2c_smbus_read_byte_data(client, SPD5118_REG_TEMP_CLR);
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if (regval)
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return -ENODEV;
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regval = i2c_smbus_read_byte_data(client, SPD5118_REG_ERROR_CLR);
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if (regval)
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return -ENODEV;
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regval = i2c_smbus_read_byte_data(client, SPD5118_REG_REVISION);
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if (regval < 0 || (regval & 0xc1))
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return -ENODEV;
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regval = i2c_smbus_read_byte_data(client, SPD5118_REG_TEMP_CONFIG);
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if (regval < 0)
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return -ENODEV;
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if (regval & ~SPD5118_TS_DISABLE)
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return -ENODEV;
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strscpy(info->type, "spd5118", I2C_NAME_SIZE);
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return 0;
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}
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static const struct hwmon_channel_info *spd5118_info[] = {
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HWMON_CHANNEL_INFO(chip,
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HWMON_C_REGISTER_TZ),
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT |
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HWMON_T_LCRIT | HWMON_T_LCRIT_ALARM |
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HWMON_T_MIN | HWMON_T_MIN_ALARM |
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HWMON_T_MAX | HWMON_T_MAX_ALARM |
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HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
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HWMON_T_ENABLE),
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NULL
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};
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static const struct hwmon_ops spd5118_hwmon_ops = {
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.is_visible = spd5118_is_visible,
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.read = spd5118_read,
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.write = spd5118_write,
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};
|
||||
|
||||
static const struct hwmon_chip_info spd5118_chip_info = {
|
||||
.ops = &spd5118_hwmon_ops,
|
||||
.info = spd5118_info,
|
||||
};
|
||||
|
||||
static bool spd5118_writeable_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case SPD5118_REG_TEMP_CLR:
|
||||
case SPD5118_REG_TEMP_CONFIG:
|
||||
case SPD5118_REG_TEMP_MAX:
|
||||
case SPD5118_REG_TEMP_MAX + 1:
|
||||
case SPD5118_REG_TEMP_MIN:
|
||||
case SPD5118_REG_TEMP_MIN + 1:
|
||||
case SPD5118_REG_TEMP_CRIT:
|
||||
case SPD5118_REG_TEMP_CRIT + 1:
|
||||
case SPD5118_REG_TEMP_LCRIT:
|
||||
case SPD5118_REG_TEMP_LCRIT + 1:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool spd5118_volatile_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case SPD5118_REG_TEMP_CLR:
|
||||
case SPD5118_REG_ERROR_CLR:
|
||||
case SPD5118_REG_TEMP:
|
||||
case SPD5118_REG_TEMP + 1:
|
||||
case SPD5118_REG_TEMP_STATUS:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct regmap_config spd5118_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = SPD5118_REG_TEMP_STATUS,
|
||||
.writeable_reg = spd5118_writeable_reg,
|
||||
.volatile_reg = spd5118_volatile_reg,
|
||||
.cache_type = REGCACHE_MAPLE,
|
||||
};
|
||||
|
||||
static int spd5118_probe(struct i2c_client *client)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
unsigned int regval, revision, vendor, bank;
|
||||
struct device *hwmon_dev;
|
||||
struct regmap *regmap;
|
||||
int err;
|
||||
|
||||
regmap = devm_regmap_init_i2c(client, &spd5118_regmap_config);
|
||||
if (IS_ERR(regmap))
|
||||
return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed\n");
|
||||
|
||||
err = regmap_read(regmap, SPD5118_REG_CAPABILITY, ®val);
|
||||
if (err)
|
||||
return err;
|
||||
if (!(regval & SPD5118_CAP_TS_SUPPORT))
|
||||
return -ENODEV;
|
||||
|
||||
err = regmap_read(regmap, SPD5118_REG_REVISION, &revision);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = regmap_read(regmap, SPD5118_REG_VENDOR, &bank);
|
||||
if (err)
|
||||
return err;
|
||||
err = regmap_read(regmap, SPD5118_REG_VENDOR + 1, &vendor);
|
||||
if (err)
|
||||
return err;
|
||||
if (!spd5118_vendor_valid(bank, vendor))
|
||||
return -ENODEV;
|
||||
|
||||
hwmon_dev = devm_hwmon_device_register_with_info(dev, "spd5118",
|
||||
regmap, &spd5118_chip_info,
|
||||
NULL);
|
||||
if (IS_ERR(hwmon_dev))
|
||||
return PTR_ERR(hwmon_dev);
|
||||
|
||||
/*
|
||||
* From JESD300-5B
|
||||
* MR2 bits [5:4]: Major revision, 1..4
|
||||
* MR2 bits [3:1]: Minor revision, 0..8? Probably a typo, assume 1..8
|
||||
*/
|
||||
dev_info(dev, "DDR5 temperature sensor: vendor 0x%02x:0x%02x revision %d.%d\n",
|
||||
bank & 0x7f, vendor, ((revision >> 4) & 0x03) + 1, ((revision >> 1) & 0x07) + 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id spd5118_id[] = {
|
||||
{ "spd5118", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, spd5118_id);
|
||||
|
||||
static const struct of_device_id spd5118_of_ids[] = {
|
||||
{ .compatible = "jedec,spd5118", },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, spd5118_of_ids);
|
||||
|
||||
static struct i2c_driver spd5118_driver = {
|
||||
.class = I2C_CLASS_HWMON,
|
||||
.driver = {
|
||||
.name = "spd5118",
|
||||
.of_match_table = spd5118_of_ids,
|
||||
},
|
||||
.probe = spd5118_probe,
|
||||
.id_table = spd5118_id,
|
||||
.detect = spd5118_detect,
|
||||
.address_list = normal_i2c,
|
||||
};
|
||||
|
||||
module_i2c_driver(spd5118_driver);
|
||||
|
||||
MODULE_AUTHOR("René Rebe <rene@exactcode.de>");
|
||||
MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
|
||||
MODULE_DESCRIPTION("SPD 5118 driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user