emac: aggregation of v1-2 PLB errors for IER register
Aggreagation of version 1-2 because of version 1 can hit PLB errors too. If it's not set so we missing events for PLB bits and driver can't process those interrupts. Signed-off-by: Ivan Mikhaylov <ivan@ru.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -682,10 +682,7 @@ static int mal_probe(struct platform_device *ofdev)
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goto fail6;
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/* Enable all MAL SERR interrupt sources */
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if (mal->version == 2)
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set_mal_dcrn(mal, MAL_IER, MAL2_IER_EVENTS);
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else
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set_mal_dcrn(mal, MAL_IER, MAL1_IER_EVENTS);
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set_mal_dcrn(mal, MAL_IER, MAL_IER_EVENTS);
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/* Enable EOB interrupt */
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mal_enable_eob_irq(mal);
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@ -95,24 +95,20 @@
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#define MAL_IER 0x02
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/* MAL IER bits */
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#define MAL_IER_DE 0x00000010
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#define MAL_IER_OTE 0x00000004
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#define MAL_IER_OE 0x00000002
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#define MAL_IER_PE 0x00000001
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/* MAL V1 IER bits */
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#define MAL1_IER_NWE 0x00000008
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#define MAL1_IER_SOC_EVENTS MAL1_IER_NWE
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#define MAL1_IER_EVENTS (MAL1_IER_SOC_EVENTS | MAL_IER_DE | \
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MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE)
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/* MAL V2 IER bits */
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#define MAL2_IER_PT 0x00000080
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#define MAL2_IER_PRE 0x00000040
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#define MAL2_IER_PWE 0x00000020
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#define MAL2_IER_SOC_EVENTS (MAL2_IER_PT | MAL2_IER_PRE | MAL2_IER_PWE)
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#define MAL2_IER_EVENTS (MAL2_IER_SOC_EVENTS | MAL_IER_DE | \
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MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE)
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/* PLB read/write/timeout errors */
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#define MAL_IER_PTE 0x00000080
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#define MAL_IER_PRE 0x00000040
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#define MAL_IER_PWE 0x00000020
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#define MAL_IER_SOC_EVENTS (MAL_IER_PTE | MAL_IER_PRE | MAL_IER_PWE)
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#define MAL_IER_EVENTS (MAL_IER_SOC_EVENTS | MAL_IER_DE | \
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MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE)
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#define MAL_TXCASR 0x04
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#define MAL_TXCARR 0x05
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