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ASoC: Intel: Used lock version to update shim registers

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We need hold lock each time updating shirm registers, otherwise,
we may set unexpected values to them when they are set in
different thread at different time sequence.

The notification work will be scheduled in global work queue,
which won't hold this sst->spinlock itself, so here we need
change to use the lock version to update shim registers.

Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jie Yang 2015-01-21 07:20:23 +08:00 committed by Mark Brown
parent f81677b4d1
commit 09a34aa582
1 changed files with 2 additions and 2 deletions
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4
sound/soc/intel/sst-haswell-ipc.c
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@ -651,11 +651,11 @@ static void hsw_notification_work(struct work_struct *work)
}
/* tell DSP that notification has been handled */
sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IPCD,
sst_dsp_shim_update_bits(hsw->dsp, SST_IPCD,
SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE);
/* unmask busy interrupt */
sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IMRX, SST_IMRX_BUSY, 0);
sst_dsp_shim_update_bits(hsw->dsp, SST_IMRX, SST_IMRX_BUSY, 0);
}
static struct ipc_message *reply_find_msg(struct sst_hsw *hsw, u32 header)