From 22724cf1467137c32f6f2ba70e517f2e1c514991 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Mon, 20 Jan 2014 20:02:38 +0800 Subject: [PATCH 01/13] ARM: dts: imx6qdl-sabresd: correct gpio key's active state From schematic, the power, vol+/- key's active state is low, so we need to set the gpio flag to active low. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index bbe2ee15deef..0d816d3be4b6 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -10,6 +10,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include #include / { @@ -58,21 +59,21 @@ power { label = "Power Button"; - gpios = <&gpio3 29 0>; + gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; gpio-key,wakeup; linux,code = ; }; volume-up { label = "Volume Up"; - gpios = <&gpio1 4 0>; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; gpio-key,wakeup; linux,code = ; }; volume-down { label = "Volume Down"; - gpios = <&gpio1 5 0>; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; gpio-key,wakeup; linux,code = ; }; From 56df2680c062466686e52ba1bf559ead7006ce7e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 6 Feb 2014 08:57:50 -0200 Subject: [PATCH 02/13] ARM: dts: imx6sl-evk: Add PFUZE100 support imx6sl-evk board has Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl-evk.dts | 113 +++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 000180428742..1899f8549dc2 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -69,6 +69,112 @@ status = "okay"; }; +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -108,6 +214,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 + MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 From 032de438cf659cf105c59c8d013b85aaf11a727c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 6 Feb 2014 08:57:51 -0200 Subject: [PATCH 03/13] ARM: dts: imx6sl-evk: Add audio support imx6sl-evk has a wm8962 codec. Add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl-evk.dts | 84 ++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 1899f8549dc2..3216edec46e9 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -43,7 +43,47 @@ gpio = <&gpio4 2 0>; enable-active-high; }; + + reg_aud3v: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "wm8962-supply-3v15"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + regulator-boot-on; + }; + + reg_aud4v: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "wm8962-supply-4v2"; + regulator-min-microvolt = <4325000>; + regulator-max-microvolt = <4325000>; + regulator-boot-on; + }; }; + + sound { + compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; + model = "wm8962-audio"; + ssi-controller = <&ssi2>; + audio-codec = <&codec>; + audio-routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "Ext Spk", "SPKOUTL", + "Ext Spk", "SPKOUTR", + "AMIC", "MICBIAS", + "IN3R", "AMIC"; + mux-int-port = <2>; + mux-ext-port = <3>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux3>; + status = "okay"; }; &ecspi1 { @@ -175,6 +215,27 @@ }; }; +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8962@1a { + compatible = "wlf,wm8962"; + reg = <0x1a>; + clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>; + DCVDD-supply = <&vgen3_reg>; + DBVDD-supply = <®_aud3v>; + AVDD-supply = <&vgen3_reg>; + CPVDD-supply = <&vgen3_reg>; + MICVDD-supply = <®_aud3v>; + PLLVDD-supply = <&vgen3_reg>; + SPKVDD1-supply = <®_aud4v>; + SPKVDD2-supply = <®_aud4v>; + }; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -189,6 +250,16 @@ MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 + MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 + >; + }; + + pinctrl_audmux3: audmux3grp { + fsl,pins = < + MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 + MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 + MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 + MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 >; }; @@ -221,6 +292,14 @@ >; }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 + MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 @@ -374,6 +453,11 @@ status = "okay"; }; +&ssi2 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; From 44659021d2b3cc90e6e23a16f0d4c2ca624fb9f6 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 6 Feb 2014 09:05:19 -0200 Subject: [PATCH 04/13] ARM: dts: imx6qdl-sabreauto: Add PFUZE100 support mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 113 +++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index d2ff7167bb1d..33e9bff9b076 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -63,6 +63,112 @@ status = "okay"; }; +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -133,6 +239,13 @@ >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_pwm3: pwm1grp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 From 33106702ceba4943431b4286c488b2effcde3497 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 6 Feb 2014 13:08:08 -0200 Subject: [PATCH 05/13] ARM: dts: imx6sl-evk: Add debug LED support GPIO3_20 is connected to a debug LED. Add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl-evk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 3216edec46e9..889422cc2c24 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -8,6 +8,7 @@ /dts-v1/; +#include #include #include "imx6sl.dtsi" @@ -19,6 +20,18 @@ reg = <0x80000000 0x40000000>; }; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + user { + label = "debug"; + gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -300,6 +313,12 @@ >; }; + pinctrl_led: ledgrp { + fsl,pins = < + MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 From 9fc77821b17155c6e0ab50b1e1dd80c2b0e63e98 Mon Sep 17 00:00:00 2001 From: Sascha Silbe Date: Thu, 6 Feb 2014 23:24:13 +0100 Subject: [PATCH 06/13] ARM: dts: imx6qdl-wandboard: use GPIO_6 for FEC interrupt Apply the same work-around for i.MX 6D/Q erratum 006687 as used for Sabre Lite for the Wandboard Dual / Quad. Like on the Sabre Lite, GPIO6 is used as a power down output for camera expansion boards. However, these expansion boards do not work with mainline yet anyway. Tested on a Wandboard Quad. Before the patch: root@arm:~# ping -q -f -c 10000 192.168.2.1 PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data. === 192.168.2.1 ping statistics === 10000 packets transmitted, 10000 received, 0% packet loss, time 97363ms rtt min/avg/max/mdev = 0.290/9.586/10.198/1.432 ms, pipe 2, ipg/ewma 9.737/9.672 ms After the patch: root@arm:~# ping -q -f -c 10000 192.168.2.1 PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data. === 192.168.2.1 ping statistics === 10000 packets transmitted, 10000 received, 0% packet loss, time 4810ms rtt min/avg/max/mdev = 0.246/0.355/0.863/0.044 ms, ipg/ewma 0.481/0.319 ms Signed-off-by: Sascha Silbe Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi index 81138b70c863..bdfdf89d405f 100644 --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi @@ -123,6 +123,7 @@ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 >; }; @@ -201,6 +202,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; phy-reset-gpios = <&gpio3 29 0>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; status = "okay"; }; From 89ef8ef45e96a784fc41768f73af12c965933935 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 12 Feb 2014 17:57:02 +0800 Subject: [PATCH 07/13] ARM: dts: imx6q: add 852MHz setpoint for CPU freq According to datasheet, i.MX6Q has setpoint of 852MHz which is exclusive with 996MHz, the fuse map of speed_grading defines the max speed of ARM, here we add this 852MHz setpoint opp info, kernel will check the speed_grading fuse and remove all illegal setpoints. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 422d169cca1b..fadf4981c0ca 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -30,6 +30,7 @@ /* kHz uV */ 1200000 1275000 996000 1250000 + 852000 1250000 792000 1150000 396000 975000 >; @@ -37,6 +38,7 @@ /* ARM kHz SOC-PU uV */ 1200000 1275000 996000 1250000 + 852000 1250000 792000 1175000 396000 1175000 >; From 35346b229332b7a03399b256d28dfc9a951a4bc3 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Wed, 19 Feb 2014 15:15:48 +0800 Subject: [PATCH 08/13] ARM: dts: imx6qdl-sabreauto: Support debug LED The D9 LED controlled by gpio on the imx6qdl-sabreauto CPU board is a debug LED according to the board design. This patch adds the relevant device tree nodes to the imx6qdl-sabreauto device tree file to support this LED. Signed-off-by: Liu Ying Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 33e9bff9b076..009abd69385d 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -10,11 +10,24 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include + / { memory { reg = <0x10000000 0x80000000>; }; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + user { + label = "debug"; + gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; + }; + }; + sound-spdif { compatible = "fsl,imx-audio-spdif", "fsl,imx-sabreauto-spdif"; @@ -217,6 +230,12 @@ >; }; + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000 + >; + }; + pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 From d2c3936ebe88ce3cc188d01be0c684884e396293 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 19 Feb 2014 08:13:48 -0300 Subject: [PATCH 09/13] ARM: dts: imx6sl-evk: Keep VGEN1 regulator always enabled On imx6sl-evk board the VGEN1 regulator powers up the NVCC_1P2V domain of the imx6sl SoC, so we need to keep it always powered. According to imx6sl datasheet the GPIO block has three supplies: NVCC33_IO, NVCC18_IO and NVCC_1P2V and it states that: "All digital I/O supplies (NVCC_xxxx) must be powered under normal conditions whether the associated I/O pins are in use or not" This problem has been observed by the fact that a GPIO connected to an LED could not work when the PMIC driver was enabled. Keeping VGEN1 regulator always enabled fixes the problem. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 889422cc2c24..864d8dfb51ca 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -195,6 +195,7 @@ vgen1_reg: vgen1 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; + regulator-always-on; }; vgen2_reg: vgen2 { From 3b4053b802e5845654673cf8330180eaab107121 Mon Sep 17 00:00:00 2001 From: Ashutosh singh Date: Thu, 20 Feb 2014 11:20:15 +0530 Subject: [PATCH 10/13] ARM: dts: imx6q-phytec: Added USB_OTG Support This patch adds support for USB_OTG on Phytec phyFLEX-i.MX6 Quad module. Signed-off-by: Ashutosh singh Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-phytec-pbab01.dts | 4 +++ arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 31 ++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts index 7d37ec60d58d..87c370268c67 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts @@ -25,6 +25,10 @@ status = "okay"; }; +&usbotg { + status = "okay"; +}; + &usdhc2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi index 0dd5d3bee01b..ee07896b30d3 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi @@ -18,6 +18,21 @@ memory { reg = <0x10000000 0x80000000>; }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usb_otg_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 15 0>; + }; + }; }; &ecspi3 { @@ -180,6 +195,14 @@ >; }; + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 @@ -225,6 +248,14 @@ status = "disabled"; }; +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "disabled"; +}; + &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; From f2d91676cba5dfeda1ba3937266f9af6d8834dd8 Mon Sep 17 00:00:00 2001 From: Ashutosh singh Date: Thu, 20 Feb 2014 11:20:16 +0530 Subject: [PATCH 11/13] ARM: dts: imx6q-phytec: Added USB_HOST Support This patch adds support for USB_HOST on Phytec phyFLEX-i.MX6 Quad module. Signed-off-by: Ashutosh singh Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-phytec-pbab01.dts | 4 ++++ arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 22 ++++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts index 87c370268c67..91aecbac6f61 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts @@ -25,6 +25,10 @@ status = "okay"; }; +&usbh1 { + status = "okay"; +}; + &usbotg { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi index ee07896b30d3..b1a78a0a8fd8 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi @@ -32,6 +32,15 @@ regulator-max-microvolt = <5000000>; gpio = <&gpio4 15 0>; }; + + reg_usb_h1_vbus: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + }; }; }; @@ -195,6 +204,12 @@ >; }; + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000 + >; + }; + pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 @@ -248,6 +263,13 @@ status = "disabled"; }; +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + status = "disabled"; +}; + &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; From 7b1c55bcc678b10ea16c9327a6e4afd844f2da66 Mon Sep 17 00:00:00 2001 From: Ashutosh singh Date: Thu, 20 Feb 2014 11:20:17 +0530 Subject: [PATCH 12/13] ARM: dts: imx6q-phytec: Added GPMI-NAND Support This patch adds support for GPMI-NAND on Phytec phyFLEX-i.MX6 Quad module. Signed-off-by: Ashutosh singh Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-phytec-pbab01.dts | 4 +++ arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 29 ++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts index 91aecbac6f61..21c8b3799bd8 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts @@ -21,6 +21,10 @@ status = "okay"; }; +&gpmi { + status = "okay"; +}; + &uart4 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi index b1a78a0a8fd8..324f1550976b 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi @@ -190,6 +190,28 @@ >; }; + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 @@ -257,6 +279,13 @@ status = "disabled"; }; +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "disabled"; +}; + &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; From 55b0ef4e1d90b3d05a24f6897da1739ef9b13f75 Mon Sep 17 00:00:00 2001 From: Ashutosh singh Date: Thu, 20 Feb 2014 11:20:18 +0530 Subject: [PATCH 13/13] ARM: dts: imx6q-phytec: Added SATA Support This patch adds support for SATA on Phytec phyFLEX-i.MX6 Quad module. Signed-off-by: Ashutosh singh Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-phytec-pbab01.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts index 21c8b3799bd8..5607c331fca8 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts @@ -25,6 +25,10 @@ status = "okay"; }; +&sata { + status = "okay"; +}; + &uart4 { status = "okay"; };