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Pin control fixes for the v5.17 series

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These two fixes should fix the issues seen on the OrangePi,
 first we needed the correct offset when calling
 pinctrl_gpio_direction(), and fixing that made a lockdep
 issue explode in our face. Both now fixed.
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Merge tag 'pinctrl-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "These two fixes should fix the issues seen on the OrangePi, first we
  needed the correct offset when calling pinctrl_gpio_direction(), and
  fixing that made a lockdep issue explode in our face. Both now fixed"

* tag 'pinctrl-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sunxi: Use unique lockdep classes for IRQs
  pinctrl-sunxi: sunxi_pinctrl_gpio_direction_in/output: use correct offset
This commit is contained in:
Linus Torvalds 2022-03-04 10:56:00 -08:00
commit 0b7344a658
1 changed files with 13 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/pinctrl/sunxi/pinctrl-sunxi.c
View File

@ -36,6 +36,13 @@
#include "../core.h"
#include "pinctrl-sunxi.h"
/*
* These lock classes tell lockdep that GPIO IRQs are in a different
* category than their parents, so it won't report false recursion.
*/
static struct lock_class_key sunxi_pinctrl_irq_lock_class;
static struct lock_class_key sunxi_pinctrl_irq_request_class;
static struct irq_chip sunxi_pinctrl_edge_irq_chip;
static struct irq_chip sunxi_pinctrl_level_irq_chip;
@ -837,7 +844,8 @@ static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip,
{
struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);
return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL, offset, true);
return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL,
chip->base + offset, true);
}
static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)
@ -890,7 +898,8 @@ static int sunxi_pinctrl_gpio_direction_output(struct gpio_chip *chip,
struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);
sunxi_pinctrl_gpio_set(chip, offset, value);
return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL, offset, false);
return sunxi_pmx_gpio_set_direction(pctl->pctl_dev, NULL,
chip->base + offset, false);
}
static int sunxi_pinctrl_gpio_of_xlate(struct gpio_chip *gc,
@ -1555,6 +1564,8 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev,
for (i = 0; i < (pctl->desc->irq_banks * IRQ_PER_BANK); i++) {
int irqno = irq_create_mapping(pctl->domain, i);
irq_set_lockdep_class(irqno, &sunxi_pinctrl_irq_lock_class,
&sunxi_pinctrl_irq_request_class);
irq_set_chip_and_handler(irqno, &sunxi_pinctrl_edge_irq_chip,
handle_edge_irq);
irq_set_chip_data(irqno, pctl);