drm/amd/powerplay: move smu types to smu_types.h
move some enum type (message, feature, clock) to smu_types.h. these types is too long in amdgpu_smu.h, and not clearly. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang
Alex Deucher
parent
2c89731803
commit
0ba5eda81a
@ -26,6 +26,7 @@
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#include "kgd_pp_interface.h"
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#include "dm_pp_interface.h"
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#include "dm_pp_smu.h"
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#include "smu_types.h"
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#define SMU_THERMAL_MINIMUM_ALERT_TEMP 0
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#define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255
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@ -150,134 +151,6 @@ struct smu_power_state {
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struct smu_hw_power_state hardware;
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};
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enum smu_message_type
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{
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SMU_MSG_TestMessage = 0,
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SMU_MSG_GetSmuVersion,
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SMU_MSG_GetDriverIfVersion,
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SMU_MSG_SetAllowedFeaturesMaskLow,
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SMU_MSG_SetAllowedFeaturesMaskHigh,
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SMU_MSG_EnableAllSmuFeatures,
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SMU_MSG_DisableAllSmuFeatures,
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SMU_MSG_EnableSmuFeaturesLow,
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SMU_MSG_EnableSmuFeaturesHigh,
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SMU_MSG_DisableSmuFeaturesLow,
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SMU_MSG_DisableSmuFeaturesHigh,
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SMU_MSG_GetEnabledSmuFeaturesLow,
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SMU_MSG_GetEnabledSmuFeaturesHigh,
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SMU_MSG_SetWorkloadMask,
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SMU_MSG_SetPptLimit,
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SMU_MSG_SetDriverDramAddrHigh,
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SMU_MSG_SetDriverDramAddrLow,
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SMU_MSG_SetToolsDramAddrHigh,
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SMU_MSG_SetToolsDramAddrLow,
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SMU_MSG_TransferTableSmu2Dram,
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SMU_MSG_TransferTableDram2Smu,
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SMU_MSG_UseDefaultPPTable,
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SMU_MSG_UseBackupPPTable,
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SMU_MSG_RunBtc,
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SMU_MSG_RequestI2CBus,
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SMU_MSG_ReleaseI2CBus,
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SMU_MSG_SetFloorSocVoltage,
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SMU_MSG_SoftReset,
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SMU_MSG_StartBacoMonitor,
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SMU_MSG_CancelBacoMonitor,
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SMU_MSG_EnterBaco,
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SMU_MSG_SetSoftMinByFreq,
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SMU_MSG_SetSoftMaxByFreq,
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SMU_MSG_SetHardMinByFreq,
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SMU_MSG_SetHardMaxByFreq,
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SMU_MSG_GetMinDpmFreq,
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SMU_MSG_GetMaxDpmFreq,
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SMU_MSG_GetDpmFreqByIndex,
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SMU_MSG_GetDpmClockFreq,
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SMU_MSG_GetSsVoltageByDpm,
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SMU_MSG_SetMemoryChannelConfig,
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SMU_MSG_SetGeminiMode,
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SMU_MSG_SetGeminiApertureHigh,
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SMU_MSG_SetGeminiApertureLow,
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SMU_MSG_SetMinLinkDpmByIndex,
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SMU_MSG_OverridePcieParameters,
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SMU_MSG_OverDriveSetPercentage,
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SMU_MSG_SetMinDeepSleepDcefclk,
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SMU_MSG_ReenableAcDcInterrupt,
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SMU_MSG_NotifyPowerSource,
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SMU_MSG_SetUclkFastSwitch,
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SMU_MSG_SetUclkDownHyst,
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SMU_MSG_GfxDeviceDriverReset,
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SMU_MSG_GetCurrentRpm,
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SMU_MSG_SetVideoFps,
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SMU_MSG_SetTjMax,
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SMU_MSG_SetFanTemperatureTarget,
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SMU_MSG_PrepareMp1ForUnload,
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SMU_MSG_DramLogSetDramAddrHigh,
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SMU_MSG_DramLogSetDramAddrLow,
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SMU_MSG_DramLogSetDramSize,
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SMU_MSG_SetFanMaxRpm,
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SMU_MSG_SetFanMinPwm,
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SMU_MSG_ConfigureGfxDidt,
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SMU_MSG_NumOfDisplays,
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SMU_MSG_RemoveMargins,
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SMU_MSG_ReadSerialNumTop32,
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SMU_MSG_ReadSerialNumBottom32,
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SMU_MSG_SetSystemVirtualDramAddrHigh,
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SMU_MSG_SetSystemVirtualDramAddrLow,
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SMU_MSG_WaflTest,
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SMU_MSG_SetFclkGfxClkRatio,
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SMU_MSG_AllowGfxOff,
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SMU_MSG_DisallowGfxOff,
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SMU_MSG_GetPptLimit,
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SMU_MSG_GetDcModeMaxDpmFreq,
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SMU_MSG_GetDebugData,
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SMU_MSG_SetXgmiMode,
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SMU_MSG_RunAfllBtc,
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SMU_MSG_ExitBaco,
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SMU_MSG_PrepareMp1ForReset,
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SMU_MSG_PrepareMp1ForShutdown,
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SMU_MSG_SetMGpuFanBoostLimitRpm,
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SMU_MSG_GetAVFSVoltageByDpm,
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SMU_MSG_PowerUpVcn,
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SMU_MSG_PowerDownVcn,
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SMU_MSG_PowerUpJpeg,
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SMU_MSG_PowerDownJpeg,
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SMU_MSG_BacoAudioD3PME,
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SMU_MSG_ArmD3,
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SMU_MSG_RunGfxDcBtc,
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SMU_MSG_RunSocDcBtc,
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SMU_MSG_SetMemoryChannelEnable,
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SMU_MSG_SetDfSwitchType,
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SMU_MSG_GetVoltageByDpm,
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SMU_MSG_GetVoltageByDpmOverdrive,
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SMU_MSG_PowerUpVcn0,
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SMU_MSG_PowerDownVcn01,
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SMU_MSG_PowerUpVcn1,
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SMU_MSG_PowerDownVcn1,
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SMU_MSG_MAX_COUNT,
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};
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enum smu_clk_type
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{
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SMU_GFXCLK,
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SMU_VCLK,
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SMU_DCLK,
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SMU_ECLK,
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SMU_SOCCLK,
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SMU_UCLK,
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SMU_DCEFCLK,
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SMU_DISPCLK,
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SMU_PIXCLK,
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SMU_PHYCLK,
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SMU_FCLK,
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SMU_SCLK,
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SMU_MCLK,
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SMU_PCIE,
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SMU_OD_SCLK,
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SMU_OD_MCLK,
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SMU_OD_VDDC_CURVE,
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SMU_OD_RANGE,
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SMU_CLK_COUNT,
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};
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enum smu_power_src_type
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{
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SMU_POWER_SOURCE_AC,
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@ -285,63 +158,6 @@ enum smu_power_src_type
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SMU_POWER_SOURCE_COUNT,
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};
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enum smu_feature_mask
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{
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SMU_FEATURE_DPM_PREFETCHER_BIT,
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SMU_FEATURE_DPM_GFXCLK_BIT,
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SMU_FEATURE_DPM_UCLK_BIT,
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SMU_FEATURE_DPM_SOCCLK_BIT,
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SMU_FEATURE_DPM_UVD_BIT,
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SMU_FEATURE_DPM_VCE_BIT,
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SMU_FEATURE_ULV_BIT,
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SMU_FEATURE_DPM_MP0CLK_BIT,
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SMU_FEATURE_DPM_LINK_BIT,
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SMU_FEATURE_DPM_DCEFCLK_BIT,
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SMU_FEATURE_DS_GFXCLK_BIT,
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SMU_FEATURE_DS_SOCCLK_BIT,
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SMU_FEATURE_DS_LCLK_BIT,
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SMU_FEATURE_PPT_BIT,
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SMU_FEATURE_TDC_BIT,
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SMU_FEATURE_THERMAL_BIT,
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SMU_FEATURE_GFX_PER_CU_CG_BIT,
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SMU_FEATURE_RM_BIT,
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SMU_FEATURE_DS_DCEFCLK_BIT,
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SMU_FEATURE_ACDC_BIT,
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SMU_FEATURE_VR0HOT_BIT,
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SMU_FEATURE_VR1HOT_BIT,
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SMU_FEATURE_FW_CTF_BIT,
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SMU_FEATURE_LED_DISPLAY_BIT,
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SMU_FEATURE_FAN_CONTROL_BIT,
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SMU_FEATURE_GFX_EDC_BIT,
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SMU_FEATURE_GFXOFF_BIT,
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SMU_FEATURE_CG_BIT,
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SMU_FEATURE_DPM_FCLK_BIT,
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SMU_FEATURE_DS_FCLK_BIT,
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SMU_FEATURE_DS_MP1CLK_BIT,
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SMU_FEATURE_DS_MP0CLK_BIT,
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SMU_FEATURE_XGMI_BIT,
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SMU_FEATURE_DPM_GFX_PACE_BIT,
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SMU_FEATURE_MEM_VDDCI_SCALING_BIT,
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SMU_FEATURE_MEM_MVDD_SCALING_BIT,
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SMU_FEATURE_DS_UCLK_BIT,
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SMU_FEATURE_GFX_ULV_BIT,
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SMU_FEATURE_FW_DSTATE_BIT,
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SMU_FEATURE_BACO_BIT,
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SMU_FEATURE_VCN_PG_BIT,
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SMU_FEATURE_JPEG_PG_BIT,
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SMU_FEATURE_USB_PG_BIT,
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SMU_FEATURE_RSMU_SMN_CG_BIT,
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SMU_FEATURE_APCC_PLUS_BIT,
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SMU_FEATURE_GTHR_BIT,
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SMU_FEATURE_GFX_DCS_BIT,
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SMU_FEATURE_GFX_SS_BIT,
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SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT,
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SMU_FEATURE_TEMP_DEPENDENT_VMIN_BIT,
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SMU_FEATURE_MMHUB_PG_BIT,
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SMU_FEATURE_ATHUB_PG_BIT,
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SMU_FEATURE_COUNT,
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};
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enum smu_memory_pool_size
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{
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SMU_MEMORY_POOL_SIZE_ZERO = 0,
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210
drivers/gpu/drm/amd/powerplay/inc/smu_types.h
Normal file
210
drivers/gpu/drm/amd/powerplay/inc/smu_types.h
Normal file
@ -0,0 +1,210 @@
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __SMU_TYPES_H__
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#define __SMU_TYPES_H__
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enum smu_message_type {
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SMU_MSG_TestMessage = 0,
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SMU_MSG_GetSmuVersion,
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SMU_MSG_GetDriverIfVersion,
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SMU_MSG_SetAllowedFeaturesMaskLow,
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SMU_MSG_SetAllowedFeaturesMaskHigh,
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SMU_MSG_EnableAllSmuFeatures,
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SMU_MSG_DisableAllSmuFeatures,
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SMU_MSG_EnableSmuFeaturesLow,
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SMU_MSG_EnableSmuFeaturesHigh,
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SMU_MSG_DisableSmuFeaturesLow,
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SMU_MSG_DisableSmuFeaturesHigh,
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SMU_MSG_GetEnabledSmuFeaturesLow,
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SMU_MSG_GetEnabledSmuFeaturesHigh,
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SMU_MSG_SetWorkloadMask,
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SMU_MSG_SetPptLimit,
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SMU_MSG_SetDriverDramAddrHigh,
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SMU_MSG_SetDriverDramAddrLow,
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SMU_MSG_SetToolsDramAddrHigh,
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SMU_MSG_SetToolsDramAddrLow,
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SMU_MSG_TransferTableSmu2Dram,
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SMU_MSG_TransferTableDram2Smu,
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SMU_MSG_UseDefaultPPTable,
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SMU_MSG_UseBackupPPTable,
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SMU_MSG_RunBtc,
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SMU_MSG_RequestI2CBus,
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SMU_MSG_ReleaseI2CBus,
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SMU_MSG_SetFloorSocVoltage,
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SMU_MSG_SoftReset,
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SMU_MSG_StartBacoMonitor,
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SMU_MSG_CancelBacoMonitor,
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SMU_MSG_EnterBaco,
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SMU_MSG_SetSoftMinByFreq,
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SMU_MSG_SetSoftMaxByFreq,
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SMU_MSG_SetHardMinByFreq,
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SMU_MSG_SetHardMaxByFreq,
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SMU_MSG_GetMinDpmFreq,
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SMU_MSG_GetMaxDpmFreq,
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SMU_MSG_GetDpmFreqByIndex,
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SMU_MSG_GetDpmClockFreq,
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SMU_MSG_GetSsVoltageByDpm,
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SMU_MSG_SetMemoryChannelConfig,
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SMU_MSG_SetGeminiMode,
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SMU_MSG_SetGeminiApertureHigh,
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SMU_MSG_SetGeminiApertureLow,
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SMU_MSG_SetMinLinkDpmByIndex,
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SMU_MSG_OverridePcieParameters,
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SMU_MSG_OverDriveSetPercentage,
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SMU_MSG_SetMinDeepSleepDcefclk,
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SMU_MSG_ReenableAcDcInterrupt,
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SMU_MSG_NotifyPowerSource,
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SMU_MSG_SetUclkFastSwitch,
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SMU_MSG_SetUclkDownHyst,
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SMU_MSG_GfxDeviceDriverReset,
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SMU_MSG_GetCurrentRpm,
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SMU_MSG_SetVideoFps,
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SMU_MSG_SetTjMax,
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SMU_MSG_SetFanTemperatureTarget,
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SMU_MSG_PrepareMp1ForUnload,
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SMU_MSG_DramLogSetDramAddrHigh,
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SMU_MSG_DramLogSetDramAddrLow,
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SMU_MSG_DramLogSetDramSize,
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SMU_MSG_SetFanMaxRpm,
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SMU_MSG_SetFanMinPwm,
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SMU_MSG_ConfigureGfxDidt,
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SMU_MSG_NumOfDisplays,
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SMU_MSG_RemoveMargins,
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SMU_MSG_ReadSerialNumTop32,
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SMU_MSG_ReadSerialNumBottom32,
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SMU_MSG_SetSystemVirtualDramAddrHigh,
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SMU_MSG_SetSystemVirtualDramAddrLow,
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SMU_MSG_WaflTest,
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SMU_MSG_SetFclkGfxClkRatio,
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SMU_MSG_AllowGfxOff,
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SMU_MSG_DisallowGfxOff,
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SMU_MSG_GetPptLimit,
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SMU_MSG_GetDcModeMaxDpmFreq,
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SMU_MSG_GetDebugData,
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SMU_MSG_SetXgmiMode,
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SMU_MSG_RunAfllBtc,
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SMU_MSG_ExitBaco,
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SMU_MSG_PrepareMp1ForReset,
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SMU_MSG_PrepareMp1ForShutdown,
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SMU_MSG_SetMGpuFanBoostLimitRpm,
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SMU_MSG_GetAVFSVoltageByDpm,
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SMU_MSG_PowerUpVcn,
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SMU_MSG_PowerDownVcn,
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SMU_MSG_PowerUpJpeg,
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SMU_MSG_PowerDownJpeg,
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SMU_MSG_BacoAudioD3PME,
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SMU_MSG_ArmD3,
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SMU_MSG_RunGfxDcBtc,
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SMU_MSG_RunSocDcBtc,
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SMU_MSG_SetMemoryChannelEnable,
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SMU_MSG_SetDfSwitchType,
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SMU_MSG_GetVoltageByDpm,
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SMU_MSG_GetVoltageByDpmOverdrive,
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SMU_MSG_PowerUpVcn0,
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SMU_MSG_PowerDownVcn01,
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SMU_MSG_PowerUpVcn1,
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SMU_MSG_PowerDownVcn1,
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SMU_MSG_MAX_COUNT,
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};
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enum smu_clk_type {
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SMU_GFXCLK,
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SMU_VCLK,
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SMU_DCLK,
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SMU_ECLK,
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SMU_SOCCLK,
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SMU_UCLK,
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SMU_DCEFCLK,
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SMU_DISPCLK,
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SMU_PIXCLK,
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SMU_PHYCLK,
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SMU_FCLK,
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SMU_SCLK,
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SMU_MCLK,
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SMU_PCIE,
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SMU_OD_SCLK,
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SMU_OD_MCLK,
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SMU_OD_VDDC_CURVE,
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SMU_OD_RANGE,
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SMU_CLK_COUNT,
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};
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enum smu_feature_mask {
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SMU_FEATURE_DPM_PREFETCHER_BIT,
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SMU_FEATURE_DPM_GFXCLK_BIT,
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SMU_FEATURE_DPM_UCLK_BIT,
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SMU_FEATURE_DPM_SOCCLK_BIT,
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SMU_FEATURE_DPM_UVD_BIT,
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SMU_FEATURE_DPM_VCE_BIT,
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SMU_FEATURE_ULV_BIT,
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SMU_FEATURE_DPM_MP0CLK_BIT,
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SMU_FEATURE_DPM_LINK_BIT,
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SMU_FEATURE_DPM_DCEFCLK_BIT,
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SMU_FEATURE_DS_GFXCLK_BIT,
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SMU_FEATURE_DS_SOCCLK_BIT,
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SMU_FEATURE_DS_LCLK_BIT,
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SMU_FEATURE_PPT_BIT,
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SMU_FEATURE_TDC_BIT,
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SMU_FEATURE_THERMAL_BIT,
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SMU_FEATURE_GFX_PER_CU_CG_BIT,
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SMU_FEATURE_RM_BIT,
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SMU_FEATURE_DS_DCEFCLK_BIT,
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SMU_FEATURE_ACDC_BIT,
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SMU_FEATURE_VR0HOT_BIT,
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SMU_FEATURE_VR1HOT_BIT,
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SMU_FEATURE_FW_CTF_BIT,
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SMU_FEATURE_LED_DISPLAY_BIT,
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SMU_FEATURE_FAN_CONTROL_BIT,
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SMU_FEATURE_GFX_EDC_BIT,
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SMU_FEATURE_GFXOFF_BIT,
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SMU_FEATURE_CG_BIT,
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SMU_FEATURE_DPM_FCLK_BIT,
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SMU_FEATURE_DS_FCLK_BIT,
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SMU_FEATURE_DS_MP1CLK_BIT,
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SMU_FEATURE_DS_MP0CLK_BIT,
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SMU_FEATURE_XGMI_BIT,
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SMU_FEATURE_DPM_GFX_PACE_BIT,
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SMU_FEATURE_MEM_VDDCI_SCALING_BIT,
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SMU_FEATURE_MEM_MVDD_SCALING_BIT,
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SMU_FEATURE_DS_UCLK_BIT,
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SMU_FEATURE_GFX_ULV_BIT,
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SMU_FEATURE_FW_DSTATE_BIT,
|
||||
SMU_FEATURE_BACO_BIT,
|
||||
SMU_FEATURE_VCN_PG_BIT,
|
||||
SMU_FEATURE_JPEG_PG_BIT,
|
||||
SMU_FEATURE_USB_PG_BIT,
|
||||
SMU_FEATURE_RSMU_SMN_CG_BIT,
|
||||
SMU_FEATURE_APCC_PLUS_BIT,
|
||||
SMU_FEATURE_GTHR_BIT,
|
||||
SMU_FEATURE_GFX_DCS_BIT,
|
||||
SMU_FEATURE_GFX_SS_BIT,
|
||||
SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT,
|
||||
SMU_FEATURE_TEMP_DEPENDENT_VMIN_BIT,
|
||||
SMU_FEATURE_MMHUB_PG_BIT,
|
||||
SMU_FEATURE_ATHUB_PG_BIT,
|
||||
SMU_FEATURE_COUNT,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user