[MTD] Nuke IVR leftovers
Support for the ITE8172 based boards was deleted a while ago so this is dead code. The Kconfig dependency on MIPS was wrong anyway, MIPS is a processor architecture and nothing else; guesses on systems architecture are likely to be wrong ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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@ -382,50 +382,6 @@ config MTD_TQM834x
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TQ Components TQM834x boards. If you have one of these boards
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and would like to use the flash chips on it, say 'Y'.
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config MTD_CSTM_MIPS_IXX
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tristate "Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board"
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depends on MIPS && MTD_CFI && MTD_JEDECPROBE && MTD_PARTITIONS
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help
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This provides a mapping driver for the Integrated Technology
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Express, Inc (ITE) QED-4N-S01B eval board and the Globespan IVR
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Reference Board. It provides the necessary addressing, length,
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buswidth, vpp code and addition setup of the flash device for
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these boards. In addition, this mapping driver can be used for
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other boards via setting of the CONFIG_MTD_CSTM_MIPS_IXX_START/
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LEN/BUSWIDTH parameters. This mapping will provide one mtd device
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using one partition. The start address can be offset from the
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beginning of flash and the len can be less than the total flash
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device size to allow a window into the flash. Both CFI and JEDEC
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probes are called.
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config MTD_CSTM_MIPS_IXX_START
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hex "Physical start address of flash mapping"
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depends on MTD_CSTM_MIPS_IXX
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default "0x8000000"
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help
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This is the physical memory location that the MTD driver will
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use for the flash chips on your particular target board.
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Refer to the memory map which should hopefully be in the
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documentation for your board.
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config MTD_CSTM_MIPS_IXX_LEN
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hex "Physical length of flash mapping"
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depends on MTD_CSTM_MIPS_IXX
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default "0x4000000"
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help
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This is the total length that the MTD driver will use for the
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flash chips on your particular board. Refer to the memory
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map which should hopefully be in the documentation for your
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board.
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config MTD_CSTM_MIPS_IXX_BUSWIDTH
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int "Bus width in octets"
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depends on MTD_CSTM_MIPS_IXX
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default "2"
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help
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This is the total bus width of the mapping of the flash chips
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on your particular board.
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config MTD_OCELOT
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tristate "Momenco Ocelot boot flash device"
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depends on MIPS && MOMENCO_OCELOT
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@ -12,7 +12,6 @@ obj-$(CONFIG_MTD_CDB89712) += cdb89712.o
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obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
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obj-$(CONFIG_MTD_BAST) += bast-flash.o
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obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
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obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
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obj-$(CONFIG_MTD_DC21285) += dc21285.o
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obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
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obj-$(CONFIG_MTD_L440GX) += l440gx.o
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@ -1,164 +0,0 @@
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/*
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* $Id: cstm_mips_ixx.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
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*
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* Mapping of a custom board with both AMD CFI and JEDEC flash in partitions.
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* Config with both CFI and JEDEC device support.
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*
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* Basically physmap.c with the addition of partitions and
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* an array of mapping info to accomodate more than one flash type per board.
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*
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* Copyright 2000 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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/* board and partition description */
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#define MAX_PHYSMAP_PARTITIONS 8
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struct cstm_mips_ixx_info {
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char *name;
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unsigned long window_addr;
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unsigned long window_size;
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int bankwidth;
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int num_partitions;
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};
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#define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type
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const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
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{
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{
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"MTD flash", // name
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CONFIG_MTD_CSTM_MIPS_IXX_START, // window_addr
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CONFIG_MTD_CSTM_MIPS_IXX_LEN, // window_size
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CONFIG_MTD_CSTM_MIPS_IXX_BUSWIDTH, // bankwidth
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1, // num_partitions
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},
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};
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static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = {
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{
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{
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.name = "main partition",
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.size = CONFIG_MTD_CSTM_MIPS_IXX_LEN,
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.offset = 0,
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},
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},
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};
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struct map_info cstm_mips_ixx_map[PHYSMAP_NUMBER];
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int __init init_cstm_mips_ixx(void)
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{
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int i;
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int jedec;
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struct mtd_info *mymtd;
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struct mtd_partition *parts;
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/* Initialize mapping */
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for (i=0;i<PHYSMAP_NUMBER;i++) {
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printk(KERN_NOTICE "cstm_mips_ixx flash device: 0x%lx at 0x%lx\n",
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cstm_mips_ixx_board_desc[i].window_size, cstm_mips_ixx_board_desc[i].window_addr);
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cstm_mips_ixx_map[i].phys = cstm_mips_ixx_board_desc[i].window_addr;
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cstm_mips_ixx_map[i].virt = ioremap(cstm_mips_ixx_board_desc[i].window_addr, cstm_mips_ixx_board_desc[i].window_size);
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if (!cstm_mips_ixx_map[i].virt) {
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int j = 0;
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printk(KERN_WARNING "Failed to ioremap\n");
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for (j = 0; j < i; j++) {
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if (cstm_mips_ixx_map[j].virt) {
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iounmap(cstm_mips_ixx_map[j].virt);
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cstm_mips_ixx_map[j].virt = NULL;
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}
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}
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return -EIO;
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}
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cstm_mips_ixx_map[i].name = cstm_mips_ixx_board_desc[i].name;
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cstm_mips_ixx_map[i].size = cstm_mips_ixx_board_desc[i].window_size;
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cstm_mips_ixx_map[i].bankwidth = cstm_mips_ixx_board_desc[i].bankwidth;
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simple_map_init(&cstm_mips_ixx_map[i]);
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//printk(KERN_NOTICE "cstm_mips_ixx: ioremap is %x\n",(unsigned int)(cstm_mips_ixx_map[i].virt));
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}
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for (i=0;i<PHYSMAP_NUMBER;i++) {
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parts = &cstm_mips_ixx_partitions[i][0];
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jedec = 0;
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mymtd = (struct mtd_info *)do_map_probe("cfi_probe", &cstm_mips_ixx_map[i]);
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//printk(KERN_NOTICE "phymap %d cfi_probe: mymtd is %x\n",i,(unsigned int)mymtd);
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if (!mymtd) {
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jedec = 1;
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mymtd = (struct mtd_info *)do_map_probe("jedec_probe", &cstm_mips_ixx_map[i]);
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printk(KERN_NOTICE "cstm_mips_ixx %d jedec: mymtd is %x\n",i,(unsigned int)mymtd);
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}
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if (mymtd) {
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mymtd->owner = THIS_MODULE;
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cstm_mips_ixx_map[i].map_priv_2 = (unsigned long)mymtd;
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add_mtd_partitions(mymtd, parts, cstm_mips_ixx_board_desc[i].num_partitions);
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}
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else {
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for (i = 0; i < PHYSMAP_NUMBER; i++) {
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if (cstm_mips_ixx_map[i].virt) {
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iounmap(cstm_mips_ixx_map[i].virt);
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cstm_mips_ixx_map[i].virt = NULL;
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}
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}
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return -ENXIO;
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}
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}
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return 0;
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}
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static void __exit cleanup_cstm_mips_ixx(void)
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{
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int i;
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struct mtd_info *mymtd;
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for (i=0;i<PHYSMAP_NUMBER;i++) {
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mymtd = (struct mtd_info *)cstm_mips_ixx_map[i].map_priv_2;
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if (mymtd) {
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del_mtd_partitions(mymtd);
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map_destroy(mymtd);
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}
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if (cstm_mips_ixx_map[i].virt) {
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iounmap((void *)cstm_mips_ixx_map[i].virt);
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cstm_mips_ixx_map[i].virt = 0;
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}
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}
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}
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module_init(init_cstm_mips_ixx);
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module_exit(cleanup_cstm_mips_ixx);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Alice Hennessy <ahennessy@mvista.com>");
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MODULE_DESCRIPTION("MTD map driver for MIPS boards");
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