mtd: rawnand: stm32_fmc2: add MP25 support
FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are available when on MP25 SoC, the 4 chip select are available. Let's use a platform data structure for parameters that will differ. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240219140505.85794-4-christophe.kerello@foss.st.com
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@ -16,6 +16,7 @@
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#include <linux/module.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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@ -37,7 +38,7 @@
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#define FMC2_MAX_SG 16
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/* Max chip enable */
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#define FMC2_MAX_CE 2
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#define FMC2_MAX_CE 4
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/* Max ECC buffer length */
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#define FMC2_MAX_ECC_BUF_LEN (FMC2_BCHDSRS_LEN * FMC2_MAX_SG)
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@ -243,6 +244,13 @@ static inline struct stm32_fmc2_nand *to_fmc2_nand(struct nand_chip *chip)
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return container_of(chip, struct stm32_fmc2_nand, chip);
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}
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struct stm32_fmc2_nfc;
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struct stm32_fmc2_nfc_data {
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int max_ncs;
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int (*set_cdev)(struct stm32_fmc2_nfc *nfc);
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};
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struct stm32_fmc2_nfc {
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struct nand_controller base;
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struct stm32_fmc2_nand nand;
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@ -256,6 +264,7 @@ struct stm32_fmc2_nfc {
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phys_addr_t data_phys_addr[FMC2_MAX_CE];
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struct clk *clk;
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u8 irq_state;
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const struct stm32_fmc2_nfc_data *data;
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struct dma_chan *dma_tx_ch;
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struct dma_chan *dma_rx_ch;
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@ -1809,7 +1818,7 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc,
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return ret;
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}
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if (cs >= FMC2_MAX_CE) {
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if (cs >= nfc->data->max_ncs) {
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dev_err(nfc->dev, "invalid reg value: %d\n", cs);
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return -EINVAL;
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}
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@ -1915,9 +1924,17 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev)
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nand_controller_init(&nfc->base);
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nfc->base.ops = &stm32_fmc2_nfc_controller_ops;
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ret = stm32_fmc2_nfc_set_cdev(nfc);
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if (ret)
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return ret;
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nfc->data = of_device_get_match_data(dev);
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if (!nfc->data)
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return -EINVAL;
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if (nfc->data->set_cdev) {
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ret = nfc->data->set_cdev(nfc);
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if (ret)
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return ret;
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} else {
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nfc->cdev = dev->parent;
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}
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ret = stm32_fmc2_nfc_parse_dt(nfc);
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if (ret)
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@ -1936,7 +1953,7 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev)
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if (nfc->dev == nfc->cdev)
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start_region = 1;
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for (chip_cs = 0, mem_region = start_region; chip_cs < FMC2_MAX_CE;
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for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs;
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chip_cs++, mem_region += 3) {
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if (!(nfc->cs_assigned & BIT(chip_cs)))
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continue;
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@ -2092,7 +2109,7 @@ static int __maybe_unused stm32_fmc2_nfc_resume(struct device *dev)
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stm32_fmc2_nfc_wp_disable(nand);
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for (chip_cs = 0; chip_cs < FMC2_MAX_CE; chip_cs++) {
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for (chip_cs = 0; chip_cs < nfc->data->max_ncs; chip_cs++) {
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if (!(nfc->cs_assigned & BIT(chip_cs)))
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continue;
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@ -2105,9 +2122,28 @@ static int __maybe_unused stm32_fmc2_nfc_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(stm32_fmc2_nfc_pm_ops, stm32_fmc2_nfc_suspend,
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stm32_fmc2_nfc_resume);
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static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp1_data = {
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.max_ncs = 2,
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.set_cdev = stm32_fmc2_nfc_set_cdev,
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};
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static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp25_data = {
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.max_ncs = 4,
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};
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static const struct of_device_id stm32_fmc2_nfc_match[] = {
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{.compatible = "st,stm32mp15-fmc2"},
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{.compatible = "st,stm32mp1-fmc2-nfc"},
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{
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.compatible = "st,stm32mp15-fmc2",
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.data = &stm32_fmc2_nfc_mp1_data,
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},
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{
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.compatible = "st,stm32mp1-fmc2-nfc",
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.data = &stm32_fmc2_nfc_mp1_data,
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},
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{
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.compatible = "st,stm32mp25-fmc2-nfc",
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.data = &stm32_fmc2_nfc_mp25_data,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, stm32_fmc2_nfc_match);
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