hwmon: (k10temp) Check range scale when CUR_TEMP register is read-write
Spec says, when CUR_TEMP_TJ_SEL == 3 and CUR_TEMP_RANGE_SEL == 0, it should use RangeUnadjusted is 0, which is (CurTmp*0.125 -49) C. The CUR_TEMP register is read-write when CUR_TEMP_TJ_SEL == 3 (bit 17-16). Add the check to detect it. Sensors command's output before the patch. $sensors k10temp-pci-00c3 Adapter: PCI adapter Tctl: +76.6°C <- Wrong value Tccd1: +26.5°C Tccd2: +27.5°C Tccd3: +27.2°C Tccd4: +27.5°C Tccd5: +26.0°C Tccd6: +26.2°C Tccd7: +25.0°C Tccd8: +26.5°C Sensors command's output after the patch. $sensors k10temp-pci-00c3 Adapter: PCI adapter Tctl: +28.8°C <- corrected value Tccd1: +27.5°C Tccd2: +28.5°C Tccd3: +28.5°C Tccd4: +28.5°C Tccd5: +27.0°C Tccd6: +27.5°C Tccd7: +27.0°C Tccd8: +27.5°C Signed-off-by: Babu Moger <babu.moger@amd.com> Fixes: 1b59788979ac ("hwmon: (k10temp) Add temperature offset for Ryzen 2700X") Link: https://lore.kernel.org/r/20230413213958.847634-1-babu.moger@amd.com Cc: stable@vger.kernel.org Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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@ -75,6 +75,7 @@ static DEFINE_MUTEX(nb_smu_ind_mutex);
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#define ZEN_CUR_TEMP_SHIFT 21
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#define ZEN_CUR_TEMP_RANGE_SEL_MASK BIT(19)
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#define ZEN_CUR_TEMP_TJ_SEL_MASK GENMASK(17, 16)
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struct k10temp_data {
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struct pci_dev *pdev;
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@ -155,7 +156,8 @@ static long get_raw_temp(struct k10temp_data *data)
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data->read_tempreg(data->pdev, ®val);
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temp = (regval >> ZEN_CUR_TEMP_SHIFT) * 125;
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if (regval & data->temp_adjust_mask)
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if ((regval & data->temp_adjust_mask) ||
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(regval & ZEN_CUR_TEMP_TJ_SEL_MASK) == ZEN_CUR_TEMP_TJ_SEL_MASK)
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temp -= 49000;
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return temp;
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}
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