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drm/amdgpu: fix and cleanup gmc_v8_0_flush_gpu_tlb_pasid

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Testing for reset is pointless since the reset can start right after the
test. Grab the reset semaphore instead.

The same PASID can be used by more than once VMID, build a mask of VMIDs
to invalidate instead of just restting the first one.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Shashank Sharma <shashank.sharma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2023-09-01 15:20:39 +02:00 committed by Alex Deucher
parent fb4c52db69
commit 0c525aa406
1 changed files with 10 additions and 10 deletions
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20
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
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@ -31,6 +31,7 @@
#include "amdgpu_ucode.h"
#include "amdgpu_amdkfd.h"
#include "amdgpu_gem.h"
#include "amdgpu_reset.h"
#include "gmc/gmc_8_1_d.h"
#include "gmc/gmc_8_1_sh_mask.h"
@ -616,25 +617,24 @@ static int gmc_v8_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
uint16_t pasid, uint32_t flush_type,
bool all_hub, uint32_t inst)
{
u32 mask = 0x0;
int vmid;
unsigned int tmp;
if (amdgpu_in_reset(adev))
return -EIO;
if (!down_read_trylock(&adev->reset_domain->sem))
return 0;
for (vmid = 1; vmid < 16; vmid++) {
u32 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
if ((tmp & ATC_VMID0_PASID_MAPPING__VALID_MASK) &&
(tmp & ATC_VMID0_PASID_MAPPING__PASID_MASK) == pasid) {
WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
RREG32(mmVM_INVALIDATE_RESPONSE);
break;
}
(tmp & ATC_VMID0_PASID_MAPPING__PASID_MASK) == pasid)
mask |= 1 << vmid;
}
WREG32(mmVM_INVALIDATE_REQUEST, mask);
RREG32(mmVM_INVALIDATE_RESPONSE);
up_read(&adev->reset_domain->sem);
return 0;
}
/*