iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

media: verisilicon: change confusingly named relaxed register access

Browse Source 
The register abstraction has wrappers around both the normal writel()
and its writel_relaxed() counterpart, but this has led to a lot of users
ending up with the relaxed version.

There is sometimes a need to intentionally pick the relaxed accessor for
performance critical functions, but I noticed that each hantro_reg_write()
call also contains a non-relaxed readl(), which is typically much more
expensive than a writel, so there is little benefit here but an added
risk of missing a serialization against DMA.

To make this behave like other interfaces, use the normal accessor by
default and only provide the relaxed version as an alternative for
performance critical code. hantro_postproc.c is the only place that
used both the relaxed and normal writel, but this does not seem
cricital either, so change it all to the normal ones.

[hverkuil: fix function prototype alignment]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Arnd Bergmann 2023-06-16 16:48:48 +02:00 committed by Mauro Carvalho Chehab
parent 7ee8acd1b8
commit 0cb1d9c845
2 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/media/platform/verisilicon/hantro.h
View File

@ -441,14 +441,14 @@ static __always_inline void hantro_reg_write(struct hantro_dev *vpu,
const struct hantro_reg *reg, const struct hantro_reg *reg,
u32 val) u32 val)
{ {
vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base); vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
} }
static __always_inline void hantro_reg_write_s(struct hantro_dev *vpu, static __always_inline void hantro_reg_write_relaxed(struct hantro_dev *vpu,
const struct hantro_reg *reg, const struct hantro_reg *reg,
u32 val) u32 val)
{ {
vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base); vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
} }
void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id); void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id);

12
drivers/media/platform/verisilicon/hantro_postproc.c
View File

@ -21,11 +21,11 @@
val); \ val); \
} }
#define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ #define HANTRO_PP_REG_WRITE_RELAXED(vpu, reg_name, val) \
{ \ { \
hantro_reg_write_s(vpu, \ hantro_reg_write_relaxed(vpu, \
&hantro_g1_postproc_regs.reg_name, \ &hantro_g1_postproc_regs.reg_name, \
val); \ val); \
} }
#define VPU_PP_IN_YUYV 0x0 #define VPU_PP_IN_YUYV 0x0
@ -72,7 +72,7 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx)
dma_addr_t dst_dma; dma_addr_t dst_dma;
/* Turn on pipeline mode. Must be done first. */ /* Turn on pipeline mode. Must be done first. */
HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1); HANTRO_PP_REG_WRITE(vpu, pipeline_en, 0x1);
src_pp_fmt = VPU_PP_IN_NV12; src_pp_fmt = VPU_PP_IN_NV12;
@ -242,7 +242,7 @@ static void hantro_postproc_g1_disable(struct hantro_ctx *ctx)
{ {
struct hantro_dev *vpu = ctx->dev; struct hantro_dev *vpu = ctx->dev;
HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); HANTRO_PP_REG_WRITE(vpu, pipeline_en, 0x0);
} }
static void hantro_postproc_g2_disable(struct hantro_ctx *ctx) static void hantro_postproc_g2_disable(struct hantro_ctx *ctx)