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Initial blind fixup for arm for irq changes

Browse Source 
Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Linus Torvalds
2006-10-06 10:53:39 -07:00
parent da104a8369
commit 0cd61b68c3
100 changed files with 281 additions and 328 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
arch/arm/common/locomo.c
View File

@ -163,8 +163,7 @@ static struct locomo_dev_info locomo_devices[] = {
#define LOCOMO_IRQ_LT_START (IRQ_LOCOMO_LT) #define LOCOMO_IRQ_LT_START (IRQ_LOCOMO_LT)
#define LOCOMO_IRQ_SPI_START (IRQ_LOCOMO_SPI_RFR) #define LOCOMO_IRQ_SPI_START (IRQ_LOCOMO_SPI_RFR)
static void locomo_handler(unsigned int irq, struct irqdesc *desc, static void locomo_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
int req, i; int req, i;
struct irqdesc *d; struct irqdesc *d;
@ -182,7 +181,7 @@ static void locomo_handler(unsigned int irq, struct irqdesc *desc,
d = irq_desc + irq; d = irq_desc + irq;
for (i = 0; i <= 3; i++, d++, irq++) { for (i = 0; i <= 3; i++, d++, irq++) {
if (req & (0x0100 << i)) { if (req & (0x0100 << i)) {
desc_handle_irq(irq, d, regs); desc_handle_irq(irq, d);
} }
} }
@ -218,15 +217,14 @@ static struct irq_chip locomo_chip = {
.unmask = locomo_unmask_irq, .unmask = locomo_unmask_irq,
}; };
static void locomo_key_handler(unsigned int irq, struct irqdesc *desc, static void locomo_key_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
struct irqdesc *d; struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq); void __iomem *mapbase = get_irq_chipdata(irq);
if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
d = irq_desc + LOCOMO_IRQ_KEY_START; d = irq_desc + LOCOMO_IRQ_KEY_START;
desc_handle_irq(LOCOMO_IRQ_KEY_START, d, regs); desc_handle_irq(LOCOMO_IRQ_KEY_START, d);
} }
} }
@ -264,8 +262,7 @@ static struct irq_chip locomo_key_chip = {
.unmask = locomo_key_unmask_irq, .unmask = locomo_key_unmask_irq,
}; };
static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc, static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
int req, i; int req, i;
struct irqdesc *d; struct irqdesc *d;
@ -280,7 +277,7 @@ static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc,
d = irq_desc + LOCOMO_IRQ_GPIO_START; d = irq_desc + LOCOMO_IRQ_GPIO_START;
for (i = 0; i <= 15; i++, irq++, d++) { for (i = 0; i <= 15; i++, irq++, d++) {
if (req & (0x0001 << i)) { if (req & (0x0001 << i)) {
desc_handle_irq(irq, d, regs); desc_handle_irq(irq, d);
} }
} }
} }
@ -328,15 +325,14 @@ static struct irq_chip locomo_gpio_chip = {
.unmask = locomo_gpio_unmask_irq, .unmask = locomo_gpio_unmask_irq,
}; };
static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc, static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
struct irqdesc *d; struct irqdesc *d;
void __iomem *mapbase = get_irq_chipdata(irq); void __iomem *mapbase = get_irq_chipdata(irq);
if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
d = irq_desc + LOCOMO_IRQ_LT_START; d = irq_desc + LOCOMO_IRQ_LT_START;
desc_handle_irq(LOCOMO_IRQ_LT_START, d, regs); desc_handle_irq(LOCOMO_IRQ_LT_START, d);
} }
} }
@ -374,8 +370,7 @@ static struct irq_chip locomo_lt_chip = {
.unmask = locomo_lt_unmask_irq, .unmask = locomo_lt_unmask_irq,
}; };
static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc, static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
int req, i; int req, i;
struct irqdesc *d; struct irqdesc *d;
@ -388,7 +383,7 @@ static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc,
for (i = 0; i <= 3; i++, irq++, d++) { for (i = 0; i <= 3; i++, irq++, d++) {
if (req & (0x0001 << i)) { if (req & (0x0001 << i)) {
desc_handle_irq(irq, d, regs); desc_handle_irq(irq, d);
} }
} }
} }

8
arch/arm/common/sa1111.c
View File

@ -147,7 +147,7 @@ void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *ho
* will call us again if there are more interrupts to process. * will call us again if there are more interrupts to process.
*/ */
static void static void
sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) sa1111_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
unsigned int stat0, stat1, i; unsigned int stat0, stat1, i;
void __iomem *base = get_irq_data(irq); void __iomem *base = get_irq_data(irq);
@ -162,17 +162,17 @@ sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
sa1111_writel(stat1, base + SA1111_INTSTATCLR1); sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
if (stat0 == 0 && stat1 == 0) { if (stat0 == 0 && stat1 == 0) {
do_bad_IRQ(irq, desc, regs); do_bad_IRQ(irq, desc);
return; return;
} }
for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
if (stat0 & 1) if (stat0 & 1)
handle_edge_irq(i, irq_desc + i, regs); handle_edge_irq(i, irq_desc + i);
for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
if (stat1 & 1) if (stat1 & 1)
handle_edge_irq(i, irq_desc + i, regs); handle_edge_irq(i, irq_desc + i);
/* For level-based interrupts */ /* For level-based interrupts */
desc->chip->unmask(irq); desc->chip->unmask(irq);

6
arch/arm/common/sharpsl_pm.c
View File

@ -258,7 +258,7 @@ static void sharpsl_ac_timer(unsigned long data)
} }
irqreturn_t sharpsl_ac_isr(int irq, void *dev_id, struct pt_regs *fp) irqreturn_t sharpsl_ac_isr(int irq, void *dev_id)
{ {
/* Delay the event slightly to debounce */ /* Delay the event slightly to debounce */
/* Must be a smaller delay than the chrg_full_isr below */ /* Must be a smaller delay than the chrg_full_isr below */
@ -293,7 +293,7 @@ static void sharpsl_chrg_full_timer(unsigned long data)
/* Charging Finished Interrupt (Not present on Corgi) */ /* Charging Finished Interrupt (Not present on Corgi) */
/* Can trigger at the same time as an AC staus change so /* Can trigger at the same time as an AC staus change so
delay until after that has been processed */ delay until after that has been processed */
irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id, struct pt_regs *fp) irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id)
{ {
if (sharpsl_pm.flags & SHARPSL_SUSPENDED) if (sharpsl_pm.flags & SHARPSL_SUSPENDED)
return IRQ_HANDLED; return IRQ_HANDLED;
@ -304,7 +304,7 @@ irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id, struct pt_regs *fp)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id, struct pt_regs *fp) irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id)
{ {
int is_fatal = 0; int is_fatal = 0;

4
arch/arm/common/time-acorn.c
View File

@ -67,10 +67,10 @@ void __init ioctime_init(void)
} }
static irqreturn_t static irqreturn_t
ioc_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) ioc_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

8
arch/arm/kernel/ecard.c
View File

@ -567,7 +567,7 @@ static void ecard_check_lockup(struct irqdesc *desc)
} }
static void static void
ecard_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) ecard_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
ecard_t *ec; ecard_t *ec;
int called = 0; int called = 0;
@ -586,7 +586,7 @@ ecard_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
if (pending) { if (pending) {
struct irqdesc *d = irq_desc + ec->irq; struct irqdesc *d = irq_desc + ec->irq;
desc_handle_irq(ec->irq, d, regs); desc_handle_irq(ec->irq, d);
called ++; called ++;
} }
} }
@ -609,7 +609,7 @@ static unsigned char first_set[] =
}; };
static void static void
ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc)
{ {
const unsigned int statusmask = 15; const unsigned int statusmask = 15;
unsigned int status; unsigned int status;
@ -633,7 +633,7 @@ ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
* Serial cards should go in 0/1, ethernet/scsi in 2/3 * Serial cards should go in 0/1, ethernet/scsi in 2/3
* otherwise you will lose serial data at high speeds! * otherwise you will lose serial data at high speeds!
*/ */
desc_handle_irq(ec->irq, d, regs); desc_handle_irq(ec->irq, d);
} else { } else {
printk(KERN_WARNING "card%d: interrupt from unclaimed " printk(KERN_WARNING "card%d: interrupt from unclaimed "
"card???\n", slot); "card???\n", slot);

3
arch/arm/kernel/irq.c
View File

@ -122,7 +122,8 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
irq_enter(); irq_enter();
desc_handle_irq(irq, desc, regs); set_irq_regs(regs);
desc_handle_irq(irq, desc);
/* AT91 specific workaround */ /* AT91 specific workaround */
irq_finish(irq); irq_finish(irq);

3
arch/arm/kernel/time.c
View File

@ -324,8 +324,9 @@ EXPORT_SYMBOL(restore_time_delta);
/* /*
* Kernel system timer support. * Kernel system timer support.
*/ */
void timer_tick(struct pt_regs *regs) void timer_tick(void)
{ {
struct pt_regs *regs = get_irq_regs();
profile_tick(CPU_PROFILING, regs); profile_tick(CPU_PROFILING, regs);
do_leds(); do_leds();
do_set_rtc(); do_set_rtc();

4
arch/arm/mach-aaec2000/core.c
View File

@ -127,12 +127,12 @@ static unsigned long aaec2000_gettimeoffset(void)
/* We enter here with IRQs enabled */ /* We enter here with IRQs enabled */
static irqreturn_t static irqreturn_t
aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) aaec2000_timer_interrupt(int irq, void *dev_id)
{ {
/* TODO: Check timer accuracy */ /* TODO: Check timer accuracy */
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
TIMER1_CLEAR = 1; TIMER1_CLEAR = 1;
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

4
arch/arm/mach-at91rm9200/at91rm9200_time.c
View File

@ -65,13 +65,13 @@ static unsigned long at91rm9200_gettimeoffset(void)
/* /*
* IRQ handler for the timer. * IRQ handler for the timer.
*/ */
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
{ {
if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */ if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) { while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) {
timer_tick(regs); timer_tick();
last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV; last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV;
} }

4
arch/arm/mach-at91rm9200/gpio.c
View File

@ -332,7 +332,7 @@ static struct irq_chip gpio_irqchip = {
.set_wake = gpio_irq_set_wake, .set_wake = gpio_irq_set_wake,
}; };
static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs) static void gpio_irq_handler(unsigned irq, struct irqdesc *desc)
{ {
unsigned pin; unsigned pin;
struct irqdesc *gpio; struct irqdesc *gpio;
@ -363,7 +363,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
gpio_irq_mask(pin); gpio_irq_mask(pin);
} }
else else
desc_handle_irq(pin, gpio, regs); desc_handle_irq(pin, gpio);
} }
pin++; pin++;
gpio++; gpio++;

4
arch/arm/mach-clps711x/time.c
View File

@ -48,10 +48,10 @@ static unsigned long clps711x_gettimeoffset(void)
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) p720t_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

4
arch/arm/mach-clps7500/core.c
View File

@ -292,11 +292,11 @@ extern void ioctime_init(void);
extern unsigned long ioc_timer_gettimeoffset(void); extern unsigned long ioc_timer_gettimeoffset(void);
static irqreturn_t static irqreturn_t
clps7500_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) clps7500_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
/* Why not using do_leds interface?? */ /* Why not using do_leds interface?? */
{ {

4
arch/arm/mach-ebsa110/core.c
View File

@ -174,7 +174,7 @@ static unsigned long ebsa110_gettimeoffset(void)
} }
static irqreturn_t static irqreturn_t
ebsa110_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) ebsa110_timer_interrupt(int irq, void *dev_id)
{ {
u32 count; u32 count;
@ -190,7 +190,7 @@ ebsa110_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
__raw_writeb(count & 0xff, PIT_T1); __raw_writeb(count & 0xff, PIT_T1);
__raw_writeb(count >> 8, PIT_T1); __raw_writeb(count >> 8, PIT_T1);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

10
arch/arm/mach-ep93xx/core.c
View File

@ -97,7 +97,7 @@ static unsigned int last_jiffy_time;
#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ) #define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static int ep93xx_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -106,7 +106,7 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
(__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
>= TIMER4_TICKS_PER_JIFFY) { >= TIMER4_TICKS_PER_JIFFY) {
last_jiffy_time += TIMER4_TICKS_PER_JIFFY; last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
timer_tick(regs); timer_tick();
} }
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
@ -245,7 +245,7 @@ EXPORT_SYMBOL(gpio_line_set);
* EP93xx IRQ handling * EP93xx IRQ handling
*************************************************************************/ *************************************************************************/
static void ep93xx_gpio_ab_irq_handler(unsigned int irq, static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
struct irqdesc *desc, struct pt_regs *regs) struct irqdesc *desc)
{ {
unsigned char status; unsigned char status;
int i; int i;
@ -254,7 +254,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (status & (1 << i)) { if (status & (1 << i)) {
desc = irq_desc + IRQ_EP93XX_GPIO(0) + i; desc = irq_desc + IRQ_EP93XX_GPIO(0) + i;
desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc, regs); desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc);
} }
} }
@ -262,7 +262,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (status & (1 << i)) { if (status & (1 << i)) {
desc = irq_desc + IRQ_EP93XX_GPIO(8) + i; desc = irq_desc + IRQ_EP93XX_GPIO(8) + i;
desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc, regs); desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc);
} }
} }
} }

4
arch/arm/mach-footbridge/dc21285-timer.c
View File

@ -28,13 +28,13 @@ static unsigned long timer1_gettimeoffset (void)
} }
static irqreturn_t static irqreturn_t
timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs) timer1_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
*CSR_TIMER1_CLR = 0; *CSR_TIMER1_CLR = 0;
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

12
arch/arm/mach-footbridge/dc21285.c
View File

@ -154,7 +154,7 @@ static void dc21285_enable_error(unsigned long __data)
/* /*
* Warn on PCI errors. * Warn on PCI errors.
*/ */
static irqreturn_t dc21285_abort_irq(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dc21285_abort_irq(int irq, void *dev_id)
{ {
unsigned int cmd; unsigned int cmd;
unsigned int status; unsigned int status;
@ -165,7 +165,7 @@ static irqreturn_t dc21285_abort_irq(int irq, void *dev_id, struct pt_regs *regs
if (status & PCI_STATUS_REC_MASTER_ABORT) { if (status & PCI_STATUS_REC_MASTER_ABORT) {
printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n",
instruction_pointer(regs)); instruction_pointer(get_irq_regs()));
cmd |= PCI_STATUS_REC_MASTER_ABORT << 16; cmd |= PCI_STATUS_REC_MASTER_ABORT << 16;
} }
@ -184,7 +184,7 @@ static irqreturn_t dc21285_abort_irq(int irq, void *dev_id, struct pt_regs *regs
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t dc21285_serr_irq(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dc21285_serr_irq(int irq, void *dev_id)
{ {
struct timer_list *timer = dev_id; struct timer_list *timer = dev_id;
unsigned int cntl; unsigned int cntl;
@ -206,7 +206,7 @@ static irqreturn_t dc21285_serr_irq(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t dc21285_discard_irq(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dc21285_discard_irq(int irq, void *dev_id)
{ {
printk(KERN_DEBUG "PCI: discard timer expired\n"); printk(KERN_DEBUG "PCI: discard timer expired\n");
*CSR_SA110_CNTL &= 0xffffde07; *CSR_SA110_CNTL &= 0xffffde07;
@ -214,7 +214,7 @@ static irqreturn_t dc21285_discard_irq(int irq, void *dev_id, struct pt_regs *re
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t dc21285_dparity_irq(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dc21285_dparity_irq(int irq, void *dev_id)
{ {
unsigned int cmd; unsigned int cmd;
@ -228,7 +228,7 @@ static irqreturn_t dc21285_dparity_irq(int irq, void *dev_id, struct pt_regs *re
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t dc21285_parity_irq(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dc21285_parity_irq(int irq, void *dev_id)
{ {
struct timer_list *timer = dev_id; struct timer_list *timer = dev_id;
unsigned int cmd; unsigned int cmd;

6
arch/arm/mach-footbridge/isa-irq.c
View File

@ -85,17 +85,17 @@ static struct irqchip isa_hi_chip = {
}; };
static void static void
isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) isa_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE;
if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) {
do_bad_IRQ(isa_irq, desc, regs); do_bad_IRQ(isa_irq, desc);
return; return;
} }
desc = irq_desc + isa_irq; desc = irq_desc + isa_irq;
desc_handle_irq(isa_irq, desc, regs); desc_handle_irq(isa_irq, desc);
} }
static struct irqaction irq_cascade = { static struct irqaction irq_cascade = {

4
arch/arm/mach-footbridge/isa-timer.c
View File

@ -62,10 +62,10 @@ static unsigned long isa_gettimeoffset(void)
} }
static irqreturn_t static irqreturn_t
isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) isa_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

29
arch/arm/mach-h720x/common.c
View File

@ -101,14 +101,14 @@ static void inline unmask_gpio_irq(u32 irq)
static void static void
h720x_gpio_handler(unsigned int mask, unsigned int irq, h720x_gpio_handler(unsigned int mask, unsigned int irq,
struct irqdesc *desc, struct pt_regs *regs) struct irqdesc *desc)
{ {
IRQDBG("%s irq: %d\n",__FUNCTION__,irq); IRQDBG("%s irq: %d\n",__FUNCTION__,irq);
desc = irq_desc + irq; desc = irq_desc + irq;
while (mask) { while (mask) {
if (mask & 1) { if (mask & 1) {
IRQDBG("handling irq %d\n", irq); IRQDBG("handling irq %d\n", irq);
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} }
irq++; irq++;
desc++; desc++;
@ -117,63 +117,58 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
} }
static void static void
h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT); mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOA(0); irq = IRQ_CHAINED_GPIOA(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
h720x_gpio_handler(mask, irq, desc, regs); h720x_gpio_handler(mask, irq, desc);
} }
static void static void
h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOB(0); irq = IRQ_CHAINED_GPIOB(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
h720x_gpio_handler(mask, irq, desc, regs); h720x_gpio_handler(mask, irq, desc);
} }
static void static void
h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT); mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOC(0); irq = IRQ_CHAINED_GPIOC(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
h720x_gpio_handler(mask, irq, desc, regs); h720x_gpio_handler(mask, irq, desc);
} }
static void static void
h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT); mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOD(0); irq = IRQ_CHAINED_GPIOD(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
h720x_gpio_handler(mask, irq, desc, regs); h720x_gpio_handler(mask, irq, desc);
} }
#ifdef CONFIG_CPU_H7202 #ifdef CONFIG_CPU_H7202
static void static void
h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT); mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOE(0); irq = IRQ_CHAINED_GPIOE(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
h720x_gpio_handler(mask, irq, desc, regs); h720x_gpio_handler(mask, irq, desc);
} }
#endif #endif

4
arch/arm/mach-h720x/cpu-h7201.c
View File

@ -27,12 +27,12 @@
* Timer interrupt handler * Timer interrupt handler
*/ */
static irqreturn_t static irqreturn_t
h7201_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) h7201_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); CPU_REG (TIMER_VIRT, TIMER_TOPSTAT);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

11
arch/arm/mach-h720x/cpu-h7202.c
View File

@ -106,8 +106,7 @@ static struct platform_device *devices[] __initdata = {
* we have to handle all timer interrupts in one place. * we have to handle all timer interrupts in one place.
*/ */
static void static void
h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc, h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
@ -115,7 +114,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
if ( mask & TSTAT_T0INT ) { if ( mask & TSTAT_T0INT ) {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
if( mask == TSTAT_T0INT ) if( mask == TSTAT_T0INT )
return; return;
@ -126,7 +125,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
desc = irq_desc + irq; desc = irq_desc + irq;
while (mask) { while (mask) {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
irq++; irq++;
desc++; desc++;
mask >>= 1; mask >>= 1;
@ -137,9 +136,9 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
* Timer interrupt handler * Timer interrupt handler
*/ */
static irqreturn_t static irqreturn_t
h7202_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) h7202_timer_interrupt(int irq, void *dev_id)
{ {
h7202_timerx_demux_handler(0, NULL, regs); h7202_timerx_demux_handler(0, NULL);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

12
arch/arm/mach-imx/dma.c
View File

@ -279,8 +279,8 @@ imx_dma_setup_sg(imx_dmach_t dma_ch,
*/ */
int int
imx_dma_setup_handlers(imx_dmach_t dma_ch, imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *), void (*irq_handler) (int, void *),
void (*err_handler) (int, void *, struct pt_regs *, int), void (*err_handler) (int, void *, int),
void *data) void *data)
{ {
struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
@ -461,7 +461,7 @@ imx_dma_request_by_prio(imx_dmach_t * pdma_ch, const char *name,
return -ENODEV; return -ENODEV;
} }
static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dma_err_handler(int irq, void *dev_id)
{ {
int i, disr = DISR; int i, disr = DISR;
struct imx_dma_channel *channel; struct imx_dma_channel *channel;
@ -500,7 +500,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs)
/*imx_dma_channels[i].sg = NULL;*/ /*imx_dma_channels[i].sg = NULL;*/
if (channel->name && channel->err_handler) { if (channel->name && channel->err_handler) {
channel->err_handler(i, channel->data, regs, errcode); channel->err_handler(i, channel->data, errcode);
continue; continue;
} }
@ -517,7 +517,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dma_irq_handler(int irq, void *dev_id)
{ {
int i, disr = DISR; int i, disr = DISR;
@ -536,7 +536,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
} else { } else {
if (channel->irq_handler) if (channel->irq_handler)
channel->irq_handler(i, channel->irq_handler(i,
channel->data, regs); channel->data);
} }
} else { } else {
/* /*

24
arch/arm/mach-imx/irq.c
View File

@ -146,13 +146,13 @@ imx_gpio_unmask_irq(unsigned int irq)
static void static void
imx_gpio_handler(unsigned int mask, unsigned int irq, imx_gpio_handler(unsigned int mask, unsigned int irq,
struct irqdesc *desc, struct pt_regs *regs) struct irqdesc *desc)
{ {
desc = irq_desc + irq; desc = irq_desc + irq;
while (mask) { while (mask) {
if (mask & 1) { if (mask & 1) {
DEBUG_IRQ("handling irq %d\n", irq); DEBUG_IRQ("handling irq %d\n", irq);
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} }
irq++; irq++;
desc++; desc++;
@ -161,47 +161,43 @@ imx_gpio_handler(unsigned int mask, unsigned int irq,
} }
static void static void
imx_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc, imx_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = ISR(0); mask = ISR(0);
irq = IRQ_GPIOA(0); irq = IRQ_GPIOA(0);
imx_gpio_handler(mask, irq, desc, regs); imx_gpio_handler(mask, irq, desc);
} }
static void static void
imx_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc, imx_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = ISR(1); mask = ISR(1);
irq = IRQ_GPIOB(0); irq = IRQ_GPIOB(0);
imx_gpio_handler(mask, irq, desc, regs); imx_gpio_handler(mask, irq, desc);
} }
static void static void
imx_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc, imx_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = ISR(2); mask = ISR(2);
irq = IRQ_GPIOC(0); irq = IRQ_GPIOC(0);
imx_gpio_handler(mask, irq, desc, regs); imx_gpio_handler(mask, irq, desc);
} }
static void static void
imx_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc, imx_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask, irq; unsigned int mask, irq;
mask = ISR(3); mask = ISR(3);
irq = IRQ_GPIOD(0); irq = IRQ_GPIOD(0);
imx_gpio_handler(mask, irq, desc, regs); imx_gpio_handler(mask, irq, desc);
} }
static struct irq_chip imx_internal_chip = { static struct irq_chip imx_internal_chip = {

4
arch/arm/mach-imx/time.c
View File

@ -56,7 +56,7 @@ static unsigned long imx_gettimeoffset(void)
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
imx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) imx_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -64,7 +64,7 @@ imx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
if (IMX_TSTAT(TIMER_BASE)) if (IMX_TSTAT(TIMER_BASE))
IMX_TSTAT(TIMER_BASE) = 0; IMX_TSTAT(TIMER_BASE) = 0;
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;

6
arch/arm/mach-integrator/core.c
View File

@ -248,7 +248,7 @@ unsigned long integrator_gettimeoffset(void)
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) integrator_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -262,7 +262,7 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
* primary CPU * primary CPU
*/ */
if (hard_smp_processor_id() == 0) { if (hard_smp_processor_id() == 0) {
timer_tick(regs); timer_tick();
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
smp_send_timer(); smp_send_timer();
#endif #endif
@ -272,7 +272,7 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
/* /*
* this is the ARM equivalent of the APIC timer interrupt * this is the ARM equivalent of the APIC timer interrupt
*/ */
update_process_times(user_mode(regs)); update_process_times(user_mode(get_irq_regs()));
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

6
arch/arm/mach-integrator/integrator_cp.c
View File

@ -202,12 +202,12 @@ static struct irq_chip sic_chip = {
}; };
static void static void
sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) sic_handle_irq(unsigned int irq, struct irqdesc *desc)
{ {
unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS); unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS);
if (status == 0) { if (status == 0) {
do_bad_IRQ(irq, desc, regs); do_bad_IRQ(irq, desc);
return; return;
} }
@ -218,7 +218,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
irq += IRQ_SIC_START; irq += IRQ_SIC_START;
desc = irq_desc + irq; desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} while (status); } while (status);
} }

3
arch/arm/mach-integrator/pci_v3.c
View File

@ -440,9 +440,10 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
return 1; return 1;
} }
static irqreturn_t v3_irq(int irq, void *devid, struct pt_regs *regs) static irqreturn_t v3_irq(int irq, void *devid)
{ {
#ifdef CONFIG_DEBUG_LL #ifdef CONFIG_DEBUG_LL
struct pt_regs *regs = get_irq_regs();
unsigned long pc = instruction_pointer(regs); unsigned long pc = instruction_pointer(regs);
unsigned long instr = *(unsigned long *)pc; unsigned long instr = *(unsigned long *)pc;
char buf[128]; char buf[128];

3
arch/arm/mach-integrator/time.c
View File

@ -96,8 +96,7 @@ static struct rtc_ops rtc_ops = {
.set_alarm = integrator_rtc_set_alarm, .set_alarm = integrator_rtc_set_alarm,
}; };
static irqreturn_t arm_rtc_interrupt(int irq, void *dev_id, static irqreturn_t arm_rtc_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
writel(0, rtc_base + RTC_EOI); writel(0, rtc_base + RTC_EOI);
return IRQ_HANDLED; return IRQ_HANDLED;

12
arch/arm/mach-ixp2000/core.c
View File

@ -204,7 +204,7 @@ unsigned long ixp2000_gettimeoffset (void)
return offset / ticks_per_usec; return offset / ticks_per_usec;
} }
static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static int ixp2000_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -213,7 +213,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr) while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr)
>= ticks_per_jiffy) { >= ticks_per_jiffy) {
timer_tick(regs); timer_tick();
next_jiffy_time -= ticks_per_jiffy; next_jiffy_time -= ticks_per_jiffy;
} }
@ -308,7 +308,7 @@ EXPORT_SYMBOL(gpio_line_config);
/************************************************************************* /*************************************************************************
* IRQ handling IXP2000 * IRQ handling IXP2000
*************************************************************************/ *************************************************************************/
static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
int i; int i;
unsigned long status = *IXP2000_GPIO_INST; unsigned long status = *IXP2000_GPIO_INST;
@ -316,7 +316,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc, str
for (i = 0; i <= 7; i++) { for (i = 0; i <= 7; i++) {
if (status & (1<<i)) { if (status & (1<<i)) {
desc = irq_desc + i + IRQ_IXP2000_GPIO0; desc = irq_desc + i + IRQ_IXP2000_GPIO0;
desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc, regs); desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc);
} }
} }
} }
@ -401,7 +401,7 @@ static void ixp2000_pci_irq_unmask(unsigned int irq)
/* /*
* Error interrupts. These are used extensively by the microengine drivers * Error interrupts. These are used extensively by the microengine drivers
*/ */
static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
int i; int i;
unsigned long status = *IXP2000_IRQ_ERR_STATUS; unsigned long status = *IXP2000_IRQ_ERR_STATUS;
@ -409,7 +409,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc, str
for(i = 31; i >= 0; i--) { for(i = 31; i >= 0; i--) {
if(status & (1 << i)) { if(status & (1 << i)) {
desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i;
desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs); desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc);
} }
} }
} }

4
arch/arm/mach-ixp2000/ixdp2x00.c
View File

@ -106,7 +106,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq)
ixp2000_release_slowport(&old_cfg); ixp2000_release_slowport(&old_cfg);
} }
static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
volatile u32 ex_interrupt = 0; volatile u32 ex_interrupt = 0;
static struct slowport_cfg old_cfg; static struct slowport_cfg old_cfg;
@ -132,7 +132,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct
struct irqdesc *cpld_desc; struct irqdesc *cpld_desc;
int cpld_irq = IXP2000_BOARD_IRQ(0) + i; int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
cpld_desc = irq_desc + cpld_irq; cpld_desc = irq_desc + cpld_irq;
desc_handle_irq(cpld_irq, cpld_desc, regs); desc_handle_irq(cpld_irq, cpld_desc);
} }
} }

4
arch/arm/mach-ixp2000/ixdp2x01.c
View File

@ -63,7 +63,7 @@ static void ixdp2x01_irq_unmask(unsigned int irq)
static u32 valid_irq_mask; static u32 valid_irq_mask;
static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
u32 ex_interrupt; u32 ex_interrupt;
int i; int i;
@ -82,7 +82,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc, struct
struct irqdesc *cpld_desc; struct irqdesc *cpld_desc;
int cpld_irq = IXP2000_BOARD_IRQ(0) + i; int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
cpld_desc = irq_desc + cpld_irq; cpld_desc = irq_desc + cpld_irq;
desc_handle_irq(cpld_irq, cpld_desc, regs); desc_handle_irq(cpld_irq, cpld_desc);
} }
} }

8
arch/arm/mach-ixp23xx/core.c
View File

@ -251,7 +251,7 @@ static void ixp23xx_pci_irq_unmask(unsigned int irq)
/* /*
* TODO: Should this just be done at ASM level? * TODO: Should this just be done at ASM level?
*/ */
static void pci_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void pci_handler(unsigned int irq, struct irqdesc *desc)
{ {
u32 pci_interrupt; u32 pci_interrupt;
unsigned int irqno; unsigned int irqno;
@ -271,7 +271,7 @@ static void pci_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *
} }
int_desc = irq_desc + irqno; int_desc = irq_desc + irqno;
desc_handle_irq(irqno, int_desc, regs); desc_handle_irq(irqno, int_desc);
desc->chip->unmask(irq); desc->chip->unmask(irq);
} }
@ -348,12 +348,12 @@ ixp23xx_gettimeoffset(void)
} }
static irqreturn_t static irqreturn_t
ixp23xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) ixp23xx_timer_interrupt(int irq, void *dev_id)
{ {
/* Clear Pending Interrupt by writing '1' to it */ /* Clear Pending Interrupt by writing '1' to it */
*IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;
while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) { while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) {
timer_tick(regs); timer_tick();
next_jiffy_time += LATCH; next_jiffy_time += LATCH;
} }

8
arch/arm/mach-ixp23xx/ixdp2351.c
View File

@ -60,7 +60,7 @@ static void ixdp2351_inta_unmask(unsigned int irq)
*IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq); *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
} }
static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc)
{ {
u16 ex_interrupt = u16 ex_interrupt =
*IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID; *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
@ -74,7 +74,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc, struct
int cpld_irq = int cpld_irq =
IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
cpld_desc = irq_desc + cpld_irq; cpld_desc = irq_desc + cpld_irq;
desc_handle_irq(cpld_irq, cpld_desc, regs); desc_handle_irq(cpld_irq, cpld_desc);
} }
} }
@ -97,7 +97,7 @@ static void ixdp2351_intb_unmask(unsigned int irq)
*IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq); *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
} }
static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc)
{ {
u16 ex_interrupt = u16 ex_interrupt =
*IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID; *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
@ -111,7 +111,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc, struct
int cpld_irq = int cpld_irq =
IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
cpld_desc = irq_desc + cpld_irq; cpld_desc = irq_desc + cpld_irq;
desc_handle_irq(cpld_irq, cpld_desc, regs); desc_handle_irq(cpld_irq, cpld_desc);
} }
} }

4
arch/arm/mach-ixp4xx/common.c
View File

@ -256,7 +256,7 @@ static unsigned volatile last_jiffy_time;
#define CLOCK_TICKS_PER_USEC ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC) #define CLOCK_TICKS_PER_USEC ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -267,7 +267,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs
* Catch up with the real idea of time * Catch up with the real idea of time
*/ */
while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) { while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) {
timer_tick(regs); timer_tick();
last_jiffy_time += LATCH; last_jiffy_time += LATCH;
} }

2
arch/arm/mach-ixp4xx/nas100d-power.c
View File

@ -24,7 +24,7 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
static irqreturn_t nas100d_reset_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
{ {
/* Signal init to do the ctrlaltdel action, this will bypass init if /* Signal init to do the ctrlaltdel action, this will bypass init if
* it hasn't started and do a kernel_restart. * it hasn't started and do a kernel_restart.

4
arch/arm/mach-ixp4xx/nslu2-power.c
View File

@ -25,7 +25,7 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t nslu2_power_handler(int irq, void *dev_id)
{ {
/* Signal init to do the ctrlaltdel action, this will bypass init if /* Signal init to do the ctrlaltdel action, this will bypass init if
* it hasn't started and do a kernel_restart. * it hasn't started and do a kernel_restart.
@ -35,7 +35,7 @@ static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *re
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t nslu2_reset_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t nslu2_reset_handler(int irq, void *dev_id)
{ {
/* This is the paper-clip reset, it shuts the machine down directly. /* This is the paper-clip reset, it shuts the machine down directly.
*/ */

5
arch/arm/mach-lh7a40x/arch-kev7a400.c
View File

@ -71,14 +71,13 @@ static struct irq_chip kev7a400_cpld_chip = {
}; };
static void kev7a400_cpld_handler (unsigned int irq, struct irqdesc *desc, static void kev7a400_cpld_handler (unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
u32 mask = CPLD_LATCHED_INTS; u32 mask = CPLD_LATCHED_INTS;
irq = IRQ_KEV7A400_CPLD; irq = IRQ_KEV7A400_CPLD;
for (; mask; mask >>= 1, ++irq) { for (; mask; mask >>= 1, ++irq) {
if (mask & 1) if (mask & 1)
desc[irq].handle (irq, desc, regs); desc[irq].handle (irq, desc);
} }
} }

3
arch/arm/mach-lh7a40x/arch-lpd7a40x.c
View File

@ -207,8 +207,7 @@ static struct irq_chip lpd7a40x_cpld_chip = {
.unmask = lh7a40x_unmask_cpld_irq, .unmask = lh7a40x_unmask_cpld_irq,
}; };
static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask = CPLD_INTERRUPTS; unsigned int mask = CPLD_INTERRUPTS;

5
arch/arm/mach-lh7a40x/irq-kev7a400.c
View File

@ -51,14 +51,13 @@ irq_chip lh7a400_cpld_chip = {
}; };
static void static void
lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc, lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
u32 mask = CPLD_LATCHED_INTS; u32 mask = CPLD_LATCHED_INTS;
irq = IRQ_KEV_7A400_CPLD; irq = IRQ_KEV_7A400_CPLD;
for (; mask; mask >>= 1, ++irq) { for (; mask; mask >>= 1, ++irq) {
if (mask & 1) if (mask & 1)
desc[irq].handle (irq, desc, regs); desc[irq].handle (irq, desc);
} }
} }

3
arch/arm/mach-lh7a40x/irq-lpd7a40x.c
View File

@ -57,8 +57,7 @@ static struct irq_chip lh7a40x_cpld_chip = {
.unmask = lh7a40x_unmask_cpld_irq, .unmask = lh7a40x_unmask_cpld_irq,
}; };
static void lh7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, static void lh7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask = CPLD_INTERRUPTS; unsigned int mask = CPLD_INTERRUPTS;

4
arch/arm/mach-lh7a40x/time.c
View File

@ -39,12 +39,12 @@
#endif #endif
static irqreturn_t static irqreturn_t
lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) lh7a40x_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
TIMER_EOI = 0; TIMER_EOI = 0;
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

5
arch/arm/mach-netx/generic.c
View File

@ -69,8 +69,7 @@ static struct platform_device *devices[] __initdata = {
#endif #endif
static void static void
netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc, netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int irq = NETX_IRQ_HIF_CHAINED(0); unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
unsigned int stat; unsigned int stat;
@ -83,7 +82,7 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
while (stat) { while (stat) {
if (stat & 1) { if (stat & 1) {
DEBUG_IRQ("handling irq %d\n", irq); DEBUG_IRQ("handling irq %d\n", irq);
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} }
irq++; irq++;
desc++; desc++;

4
arch/arm/mach-netx/time.c
View File

@ -38,11 +38,11 @@ static unsigned long netx_gettimeoffset(void)
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) netx_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
/* acknowledge interrupt */ /* acknowledge interrupt */

2
arch/arm/mach-omap1/board-osk.c
View File

@ -327,7 +327,7 @@ static struct spi_board_info __initdata mistral_boardinfo[] = { {
#ifdef CONFIG_PM #ifdef CONFIG_PM
static irqreturn_t static irqreturn_t
osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) osk_mistral_wake_interrupt(int irq, void *ignored)
{ {
return IRQ_HANDLED; return IRQ_HANDLED;
} }

5
arch/arm/mach-omap1/fpga.c
View File

@ -84,8 +84,7 @@ static void fpga_mask_ack_irq(unsigned int irq)
fpga_ack_irq(irq); fpga_ack_irq(irq);
} }
void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc, void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
struct irqdesc *d; struct irqdesc *d;
u32 stat; u32 stat;
@ -101,7 +100,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
fpga_irq++, stat >>= 1) { fpga_irq++, stat >>= 1) {
if (stat & 1) { if (stat & 1) {
d = irq_desc + fpga_irq; d = irq_desc + fpga_irq;
desc_handle_irq(fpga_irq, d, regs); desc_handle_irq(fpga_irq, d);
} }
} }
} }

3
arch/arm/mach-omap1/pm.c
View File

@ -682,8 +682,7 @@ static int omap_pm_finish(suspend_state_t state)
} }
static irqreturn_t omap_wakeup_interrupt(int irq, void * dev, static irqreturn_t omap_wakeup_interrupt(int irq, void *dev)
struct pt_regs * regs)
{ {
return IRQ_HANDLED; return IRQ_HANDLED;
} }

3
arch/arm/mach-omap1/serial.c
View File

@ -204,8 +204,7 @@ void __init omap_serial_init(void)
#ifdef CONFIG_OMAP_SERIAL_WAKE #ifdef CONFIG_OMAP_SERIAL_WAKE
static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id, static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
/* Need to do something with serial port right after wake-up? */ /* Need to do something with serial port right after wake-up? */
return IRQ_HANDLED; return IRQ_HANDLED;

8
arch/arm/mach-omap1/time.c
View File

@ -160,8 +160,7 @@ static unsigned long omap_mpu_timer_gettimeoffset(void)
* Latency during the interrupt is calculated using timer1. * Latency during the interrupt is calculated using timer1.
* Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz). * Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz).
*/ */
static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id, static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
unsigned long now, latency; unsigned long now, latency;
@ -169,7 +168,7 @@ static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id,
now = 0 - omap_mpu_timer_read(0); now = 0 - omap_mpu_timer_read(0);
latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1); latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1);
omap_mpu_timer_last = now - latency; omap_mpu_timer_last = now - latency;
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
@ -182,8 +181,7 @@ static struct irqaction omap_mpu_timer_irq = {
}; };
static unsigned long omap_mpu_timer1_overflows; static unsigned long omap_mpu_timer1_overflows;
static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id, static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
omap_mpu_timer1_overflows++; omap_mpu_timer1_overflows++;
return IRQ_HANDLED; return IRQ_HANDLED;

2
arch/arm/mach-omap2/board-apollon.c
View File

@ -203,7 +203,7 @@ static void __init apollon_led_init(void)
omap_set_gpio_dataout(LED2_GPIO15, 0); omap_set_gpio_dataout(LED2_GPIO15, 0);
} }
static irqreturn_t apollon_sw_interrupt(int irq, void *ignored, struct pt_regs *regs) static irqreturn_t apollon_sw_interrupt(int irq, void *ignored)
{ {
static unsigned int led0, led1, led2; static unsigned int led0, led1, led2;

5
arch/arm/mach-omap2/timer-gp.c
View File

@ -37,13 +37,12 @@ static inline void omap2_gp_timer_start(unsigned long load_val)
omap_dm_timer_start(gptimer); omap_dm_timer_start(gptimer);
} }
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

10
arch/arm/mach-pnx4008/dma.c
View File

@ -32,7 +32,7 @@
static struct dma_channel { static struct dma_channel {
char *name; char *name;
void (*irq_handler) (int, int, void *, struct pt_regs *); void (*irq_handler) (int, int, void *);
void *data; void *data;
struct pnx4008_dma_ll *ll; struct pnx4008_dma_ll *ll;
u32 ll_dma; u32 ll_dma;
@ -150,8 +150,7 @@ static inline void pnx4008_dma_unlock(void)
#define VALID_CHANNEL(c) (((c) >= 0) && ((c) < MAX_DMA_CHANNELS)) #define VALID_CHANNEL(c) (((c) >= 0) && ((c) < MAX_DMA_CHANNELS))
int pnx4008_request_channel(char *name, int ch, int pnx4008_request_channel(char *name, int ch,
void (*irq_handler) (int, int, void *, void (*irq_handler) (int, int, void *), void *data)
struct pt_regs *), void *data)
{ {
int i, found = 0; int i, found = 0;
@ -1033,7 +1032,7 @@ int pnx4008_dma_ch_enabled(int ch)
EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled); EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled);
static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dma_irq_handler(int irq, void *dev_id)
{ {
int i; int i;
unsigned long dint = __raw_readl(DMAC_INT_STAT); unsigned long dint = __raw_readl(DMAC_INT_STAT);
@ -1053,8 +1052,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
cause |= DMA_ERR_INT; cause |= DMA_ERR_INT;
if (tcint & i_bit) if (tcint & i_bit)
cause |= DMA_TC_INT; cause |= DMA_TC_INT;
channel->irq_handler(i, cause, channel->data, channel->irq_handler(i, cause, channel->data);
regs);
} else { } else {
/* /*
* IRQ for an unregistered DMA channel * IRQ for an unregistered DMA channel

5
arch/arm/mach-pnx4008/time.c
View File

@ -47,15 +47,14 @@ static unsigned long pnx4008_gettimeoffset(void)
/*! /*!
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id, static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
if (__raw_readl(HSTIM_INT) & MATCH0_INT) { if (__raw_readl(HSTIM_INT) & MATCH0_INT) {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
do { do {
timer_tick(regs); timer_tick();
/* /*
* this algorithm takes care of possible delay * this algorithm takes care of possible delay

2
arch/arm/mach-pxa/corgi.c
View File

@ -212,7 +212,7 @@ static struct platform_device corgits_device = {
*/ */
static struct pxamci_platform_data corgi_mci_platform_data; static struct pxamci_platform_data corgi_mci_platform_data;
static int corgi_mci_init(struct device *dev, irqreturn_t (*corgi_detect_int)(int, void *, struct pt_regs *), void *data) static int corgi_mci_init(struct device *dev, irqreturn_t (*corgi_detect_int)(int, void *), void *data)
{ {
int err; int err;

8
arch/arm/mach-pxa/dma.c
View File

@ -27,13 +27,13 @@
static struct dma_channel { static struct dma_channel {
char *name; char *name;
void (*irq_handler)(int, void *, struct pt_regs *); void (*irq_handler)(int, void *);
void *data; void *data;
} dma_channels[PXA_DMA_CHANNELS]; } dma_channels[PXA_DMA_CHANNELS];
int pxa_request_dma (char *name, pxa_dma_prio prio, int pxa_request_dma (char *name, pxa_dma_prio prio,
void (*irq_handler)(int, void *, struct pt_regs *), void (*irq_handler)(int, void *),
void *data) void *data)
{ {
unsigned long flags; unsigned long flags;
@ -87,7 +87,7 @@ void pxa_free_dma (int dma_ch)
local_irq_restore(flags); local_irq_restore(flags);
} }
static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dma_irq_handler(int irq, void *dev_id)
{ {
int i, dint = DINT; int i, dint = DINT;
@ -95,7 +95,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
if (dint & (1 << i)) { if (dint & (1 << i)) {
struct dma_channel *channel = &dma_channels[i]; struct dma_channel *channel = &dma_channels[i];
if (channel->name && channel->irq_handler) { if (channel->name && channel->irq_handler) {
channel->irq_handler(i, channel->data, regs); channel->irq_handler(i, channel->data);
} else { } else {
/* /*
* IRQ for an unregistered DMA channel: * IRQ for an unregistered DMA channel:

2
arch/arm/mach-pxa/idp.c
View File

@ -125,7 +125,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
.pxafb_lcd_power = &idp_lcd_power .pxafb_lcd_power = &idp_lcd_power
}; };
static int idp_mci_init(struct device *dev, irqreturn_t (*idp_detect_int)(int, void *, struct pt_regs *), void *data) static int idp_mci_init(struct device *dev, irqreturn_t (*idp_detect_int)(int, void *), void *data)
{ {
/* setup GPIO for PXA25x MMC controller */ /* setup GPIO for PXA25x MMC controller */
pxa_gpio_mode(GPIO6_MMCCLK_MD); pxa_gpio_mode(GPIO6_MMCCLK_MD);

11
arch/arm/mach-pxa/irq.c
View File

@ -143,8 +143,7 @@ static struct irq_chip pxa_low_gpio_chip = {
* Demux handler for GPIO>=2 edge detect interrupts * Demux handler for GPIO>=2 edge detect interrupts
*/ */
static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc, static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask; unsigned int mask;
int loop; int loop;
@ -160,7 +159,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
mask >>= 2; mask >>= 2;
do { do {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
irq++; irq++;
desc++; desc++;
mask >>= 1; mask >>= 1;
@ -175,7 +174,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
desc = irq_desc + irq; desc = irq_desc + irq;
do { do {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
irq++; irq++;
desc++; desc++;
mask >>= 1; mask >>= 1;
@ -190,7 +189,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
desc = irq_desc + irq; desc = irq_desc + irq;
do { do {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
irq++; irq++;
desc++; desc++;
mask >>= 1; mask >>= 1;
@ -206,7 +205,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
desc = irq_desc + irq; desc = irq_desc + irq;
do { do {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
irq++; irq++;
desc++; desc++;
mask >>= 1; mask >>= 1;

5
arch/arm/mach-pxa/lpd270.c
View File

@ -75,8 +75,7 @@ static struct irq_chip lpd270_irq_chip = {
.unmask = lpd270_unmask_irq, .unmask = lpd270_unmask_irq,
}; };
static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc, static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned long pending; unsigned long pending;
@ -86,7 +85,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc,
if (likely(pending)) { if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending); irq = LPD270_IRQ(0) + __ffs(pending);
desc = irq_desc + irq; desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
pending = __raw_readw(LPD270_INT_STATUS) & pending = __raw_readw(LPD270_INT_STATUS) &
lpd270_irq_enabled; lpd270_irq_enabled;

13
arch/arm/mach-pxa/lubbock.c
View File

@ -85,8 +85,7 @@ static struct irq_chip lubbock_irq_chip = {
.unmask = lubbock_unmask_irq, .unmask = lubbock_unmask_irq,
}; };
static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc, static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
do { do {
@ -94,7 +93,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc,
if (likely(pending)) { if (likely(pending)) {
irq = LUBBOCK_IRQ(0) + __ffs(pending); irq = LUBBOCK_IRQ(0) + __ffs(pending);
desc = irq_desc + irq; desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} }
pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
} while (pending); } while (pending);
@ -379,7 +378,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
#define MMC_POLL_RATE msecs_to_jiffies(1000) #define MMC_POLL_RATE msecs_to_jiffies(1000)
static void lubbock_mmc_poll(unsigned long); static void lubbock_mmc_poll(unsigned long);
static irqreturn_t (*mmc_detect_int)(int, void *, struct pt_regs *); static irqreturn_t (*mmc_detect_int)(int, void *);
static struct timer_list mmc_timer = { static struct timer_list mmc_timer = {
.function = lubbock_mmc_poll, .function = lubbock_mmc_poll,
@ -403,17 +402,17 @@ static void lubbock_mmc_poll(unsigned long data)
} }
} }
static irqreturn_t lubbock_detect_int(int irq, void *data, struct pt_regs *regs) static irqreturn_t lubbock_detect_int(int irq, void *data)
{ {
/* IRQ is level triggered; disable, and poll for removal */ /* IRQ is level triggered; disable, and poll for removal */
disable_irq(irq); disable_irq(irq);
mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
return mmc_detect_int(irq, data, regs); return mmc_detect_int(irq, data);
} }
static int lubbock_mci_init(struct device *dev, static int lubbock_mci_init(struct device *dev,
irqreturn_t (*detect_int)(int, void *, struct pt_regs *), irqreturn_t (*detect_int)(int, void *),
void *data) void *data)
{ {
/* setup GPIO for PXA25x MMC controller */ /* setup GPIO for PXA25x MMC controller */

7
arch/arm/mach-pxa/mainstone.c
View File

@ -71,8 +71,7 @@ static struct irq_chip mainstone_irq_chip = {
.unmask = mainstone_unmask_irq, .unmask = mainstone_unmask_irq,
}; };
static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc, static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do { do {
@ -80,7 +79,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
if (likely(pending)) { if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending); irq = MAINSTONE_IRQ(0) + __ffs(pending);
desc = irq_desc + irq; desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} }
pending = MST_INTSETCLR & mainstone_irq_enabled; pending = MST_INTSETCLR & mainstone_irq_enabled;
} while (pending); } while (pending);
@ -314,7 +313,7 @@ static struct pxafb_mach_info mainstone_pxafb_info = {
.pxafb_backlight_power = mainstone_backlight_power, .pxafb_backlight_power = mainstone_backlight_power,
}; };
static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data) static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *), void *data)
{ {
int err; int err;

2
arch/arm/mach-pxa/poodle.c
View File

@ -197,7 +197,7 @@ static struct platform_device poodle_ts_device = {
*/ */
static struct pxamci_platform_data poodle_mci_platform_data; static struct pxamci_platform_data poodle_mci_platform_data;
static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)(int, void *, struct pt_regs *), void *data) static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)(int, void *), void *data)
{ {
int err; int err;

2
arch/arm/mach-pxa/spitz.c
View File

@ -291,7 +291,7 @@ static struct platform_device spitzts_device = {
static struct pxamci_platform_data spitz_mci_platform_data; static struct pxamci_platform_data spitz_mci_platform_data;
static int spitz_mci_init(struct device *dev, irqreturn_t (*spitz_detect_int)(int, void *, struct pt_regs *), void *data) static int spitz_mci_init(struct device *dev, irqreturn_t (*spitz_detect_int)(int, void *), void *data)
{ {
int err; int err;

2
arch/arm/mach-pxa/ssp.c
View File

@ -65,7 +65,7 @@ static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = {
static DEFINE_MUTEX(mutex); static DEFINE_MUTEX(mutex);
static int use_count[PXA_SSP_PORTS] = {0, 0, 0}; static int use_count[PXA_SSP_PORTS] = {0, 0, 0};
static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t ssp_interrupt(int irq, void *dev_id)
{ {
struct ssp_dev *dev = (struct ssp_dev*) dev_id; struct ssp_dev *dev = (struct ssp_dev*) dev_id;
unsigned int status = SSSR_P(dev->port); unsigned int status = SSSR_P(dev->port);

8
arch/arm/mach-pxa/time.c
View File

@ -75,7 +75,7 @@ static int match_posponed;
#endif #endif
static irqreturn_t static irqreturn_t
pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) pxa_timer_interrupt(int irq, void *dev_id)
{ {
int next_match; int next_match;
@ -105,7 +105,7 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
* exactly one tick period which should be a pretty rare event. * exactly one tick period which should be a pretty rare event.
*/ */
do { do {
timer_tick(regs); timer_tick();
OSSR = OSSR_M0; /* Clear match on timer 0 */ OSSR = OSSR_M0; /* Clear match on timer 0 */
next_match = (OSMR0 += LATCH); next_match = (OSMR0 += LATCH);
} while( (signed long)(next_match - OSCR) <= 8 ); } while( (signed long)(next_match - OSCR) <= 8 );
@ -157,13 +157,13 @@ static void pxa_dyn_tick_reprogram(unsigned long ticks)
} }
static irqreturn_t static irqreturn_t
pxa_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs) pxa_dyn_tick_handler(int irq, void *dev_id)
{ {
if (match_posponed) { if (match_posponed) {
match_posponed = 0; match_posponed = 0;
OSMR0 = initial_match; OSMR0 = initial_match;
if ( (signed long)(initial_match - OSCR) <= 8 ) if ( (signed long)(initial_match - OSCR) <= 8 )
return pxa_timer_interrupt(irq, dev_id, regs); return pxa_timer_interrupt(irq, dev_id);
} }
return IRQ_NONE; return IRQ_NONE;
} }

2
arch/arm/mach-pxa/tosa.c
View File

@ -174,7 +174,7 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
*/ */
static struct pxamci_platform_data tosa_mci_platform_data; static struct pxamci_platform_data tosa_mci_platform_data;
static int tosa_mci_init(struct device *dev, irqreturn_t (*tosa_detect_int)(int, void *, struct pt_regs *), void *data) static int tosa_mci_init(struct device *dev, irqreturn_t (*tosa_detect_int)(int, void *), void *data)
{ {
int err; int err;

2
arch/arm/mach-pxa/trizeps4.c
View File

@ -270,7 +270,7 @@ void board_pcmcia_power(int power) {;}
#endif /* CONFIG_MACH_TRIZEPS4_CONXS */ #endif /* CONFIG_MACH_TRIZEPS4_CONXS */
EXPORT_SYMBOL(board_pcmcia_power); EXPORT_SYMBOL(board_pcmcia_power);
static int trizeps4_mci_init(struct device *dev, irqreturn_t (*mci_detect_int)(int, void *, struct pt_regs *), void *data) static int trizeps4_mci_init(struct device *dev, irqreturn_t (*mci_detect_int)(int, void *), void *data)
{ {
int err; int err;
/* setup GPIO for PXA27x MMC controller */ /* setup GPIO for PXA27x MMC controller */

6
arch/arm/mach-realview/core.c
View File

@ -515,18 +515,18 @@ static unsigned long realview_gettimeoffset(void)
/* /*
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
// ...clear the interrupt // ...clear the interrupt
writel(1, TIMER0_VA_BASE + TIMER_INTCLR); writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
timer_tick(regs); timer_tick();
#if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS) #if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS)
smp_send_timer(); smp_send_timer();
update_process_times(user_mode(regs)); update_process_times(user_mode(get_irq_regs()));
#endif #endif
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

2
arch/arm/mach-rpc/dma.c
View File

@ -83,7 +83,7 @@ static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma)
sg->length |= flags; sg->length |= flags;
} }
static irqreturn_t iomd_dma_handle(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t iomd_dma_handle(int irq, void *dev_id)
{ {
dma_t *dma = (dma_t *)dev_id; dma_t *dma = (dma_t *)dev_id;
unsigned long base = dma->dma_base; unsigned long base = dma->dma_base;

5
arch/arm/mach-s3c2410/bast-irq.c
View File

@ -112,8 +112,7 @@ static struct irqchip bast_pc104_chip = {
static void static void
bast_irq_pc104_demux(unsigned int irq, bast_irq_pc104_demux(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int stat; unsigned int stat;
unsigned int irqno; unsigned int irqno;
@ -133,7 +132,7 @@ bast_irq_pc104_demux(unsigned int irq,
if (stat & 1) { if (stat & 1) {
irqno = bast_pc104_irqs[i]; irqno = bast_pc104_irqs[i];
desc = irq_desc + irqno; desc = irq_desc + irqno;
desc_handle_irq(irqno, desc, regs); desc_handle_irq(irqno, desc);
} }
} }
} }

2
arch/arm/mach-s3c2410/dma.c
View File

@ -595,7 +595,7 @@ s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
#define dmadbg2(x...) #define dmadbg2(x...)
static irqreturn_t static irqreturn_t
s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) s3c2410_dma_irq(int irq, void *devpw)
{ {
struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw; struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw;
struct s3c2410_dma_buf *buf; struct s3c2410_dma_buf *buf;

41
arch/arm/mach-s3c2410/irq.c
View File

@ -480,8 +480,7 @@ static struct irqchip s3c_irq_adc = {
/* irq demux for adc */ /* irq demux for adc */
static void s3c_irq_demux_adc(unsigned int irq, static void s3c_irq_demux_adc(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int subsrc, submsk; unsigned int subsrc, submsk;
unsigned int offset = 9; unsigned int offset = 9;
@ -500,17 +499,16 @@ static void s3c_irq_demux_adc(unsigned int irq,
if (subsrc != 0) { if (subsrc != 0) {
if (subsrc & 1) { if (subsrc & 1) {
mydesc = irq_desc + IRQ_TC; mydesc = irq_desc + IRQ_TC;
desc_handle_irq(IRQ_TC, mydesc, regs); desc_handle_irq(IRQ_TC, mydesc);
} }
if (subsrc & 2) { if (subsrc & 2) {
mydesc = irq_desc + IRQ_ADC; mydesc = irq_desc + IRQ_ADC;
desc_handle_irq(IRQ_ADC, mydesc, regs); desc_handle_irq(IRQ_ADC, mydesc);
} }
} }
} }
static void s3c_irq_demux_uart(unsigned int start, static void s3c_irq_demux_uart(unsigned int start)
struct pt_regs *regs)
{ {
unsigned int subsrc, submsk; unsigned int subsrc, submsk;
unsigned int offset = start - IRQ_S3CUART_RX0; unsigned int offset = start - IRQ_S3CUART_RX0;
@ -533,17 +531,17 @@ static void s3c_irq_demux_uart(unsigned int start,
desc = irq_desc + start; desc = irq_desc + start;
if (subsrc & 1) if (subsrc & 1)
desc_handle_irq(start, desc, regs); desc_handle_irq(start, desc);
desc++; desc++;
if (subsrc & 2) if (subsrc & 2)
desc_handle_irq(start+1, desc, regs); desc_handle_irq(start+1, desc);
desc++; desc++;
if (subsrc & 4) if (subsrc & 4)
desc_handle_irq(start+2, desc, regs); desc_handle_irq(start+2, desc);
} }
} }
@ -551,35 +549,31 @@ static void s3c_irq_demux_uart(unsigned int start,
static void static void
s3c_irq_demux_uart0(unsigned int irq, s3c_irq_demux_uart0(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
irq = irq; irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX0, regs); s3c_irq_demux_uart(IRQ_S3CUART_RX0);
} }
static void static void
s3c_irq_demux_uart1(unsigned int irq, s3c_irq_demux_uart1(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
irq = irq; irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX1, regs); s3c_irq_demux_uart(IRQ_S3CUART_RX1);
} }
static void static void
s3c_irq_demux_uart2(unsigned int irq, s3c_irq_demux_uart2(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
irq = irq; irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX2, regs); s3c_irq_demux_uart(IRQ_S3CUART_RX2);
} }
static void static void
s3c_irq_demux_extint8(unsigned int irq, s3c_irq_demux_extint8(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND); unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK); unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@ -594,15 +588,14 @@ s3c_irq_demux_extint8(unsigned int irq,
eintpnd &= ~(1<<irq); eintpnd &= ~(1<<irq);
irq += (IRQ_EINT4 - 4); irq += (IRQ_EINT4 - 4);
desc_handle_irq(irq, irq_desc + irq, regs); desc_handle_irq(irq, irq_desc + irq);
} }
} }
static void static void
s3c_irq_demux_extint4t7(unsigned int irq, s3c_irq_demux_extint4t7(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND); unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK); unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@ -618,7 +611,7 @@ s3c_irq_demux_extint4t7(unsigned int irq,
irq += (IRQ_EINT4 - 4); irq += (IRQ_EINT4 - 4);
desc_handle_irq(irq, irq_desc + irq, regs); desc_handle_irq(irq, irq_desc + irq);
} }
} }

2
arch/arm/mach-s3c2410/mach-amlm5900.c
View File

@ -226,7 +226,7 @@ static struct s3c2410fb_mach_info __initdata amlm5900_lcd_info = {
#endif #endif
static irqreturn_t static irqreturn_t
amlm5900_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) amlm5900_wake_interrupt(int irq, void *ignored)
{ {
return IRQ_HANDLED; return IRQ_HANDLED;
} }

7
arch/arm/mach-s3c2410/s3c2440-irq.c
View File

@ -42,8 +42,7 @@
/* WDT/AC97 */ /* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq, static void s3c_irq_demux_wdtac97(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int subsrc, submsk; unsigned int subsrc, submsk;
struct irqdesc *mydesc; struct irqdesc *mydesc;
@ -61,11 +60,11 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
if (subsrc != 0) { if (subsrc != 0) {
if (subsrc & 1) { if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_WDT; mydesc = irq_desc + IRQ_S3C2440_WDT;
desc_handle_irq(IRQ_S3C2440_WDT, mydesc, regs); desc_handle_irq(IRQ_S3C2440_WDT, mydesc);
} }
if (subsrc & 2) { if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_AC97; mydesc = irq_desc + IRQ_S3C2440_AC97;
desc_handle_irq(IRQ_S3C2440_AC97, mydesc, regs); desc_handle_irq(IRQ_S3C2440_AC97, mydesc);
} }
} }
} }

7
arch/arm/mach-s3c2410/s3c244x-irq.c
View File

@ -42,8 +42,7 @@
/* camera irq */ /* camera irq */
static void s3c_irq_demux_cam(unsigned int irq, static void s3c_irq_demux_cam(unsigned int irq,
struct irqdesc *desc, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int subsrc, submsk; unsigned int subsrc, submsk;
struct irqdesc *mydesc; struct irqdesc *mydesc;
@ -61,11 +60,11 @@ static void s3c_irq_demux_cam(unsigned int irq,
if (subsrc != 0) { if (subsrc != 0) {
if (subsrc & 1) { if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_CAM_C; mydesc = irq_desc + IRQ_S3C2440_CAM_C;
desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs); desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc);
} }
if (subsrc & 2) { if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_CAM_P; mydesc = irq_desc + IRQ_S3C2440_CAM_P;
desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs); desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc);
} }
} }
} }

4
arch/arm/mach-s3c2410/time.c
View File

@ -128,10 +128,10 @@ static unsigned long s3c2410_gettimeoffset (void)
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) s3c2410_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

2
arch/arm/mach-s3c2410/usb-simtec.c
View File

@ -58,7 +58,7 @@ usb_simtec_powercontrol(int port, int to)
} }
static irqreturn_t static irqreturn_t
usb_simtec_ocirq(int irq, void *pw, struct pt_regs *regs) usb_simtec_ocirq(int irq, void *pw)
{ {
struct s3c2410_hcd_info *info = (struct s3c2410_hcd_info *)pw; struct s3c2410_hcd_info *info = (struct s3c2410_hcd_info *)pw;

2
arch/arm/mach-sa1100/dma.c
View File

@ -42,7 +42,7 @@ static sa1100_dma_t dma_chan[SA1100_DMA_CHANNELS];
static spinlock_t dma_list_lock; static spinlock_t dma_list_lock;
static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t dma_irq_handler(int irq, void *dev_id)
{ {
dma_regs_t *dma_regs = dev_id; dma_regs_t *dma_regs = dev_id;
sa1100_dma_t *dma = dma_chan + (((u_int)dma_regs >> 5) & 7); sa1100_dma_t *dma = dma_chan + (((u_int)dma_regs >> 5) & 7);

6
arch/arm/mach-sa1100/h3600.c
View File

@ -702,7 +702,7 @@ static u32 gpio_irq_mask[] = {
GPIO2_SD_CON_SLT, GPIO2_SD_CON_SLT,
}; };
static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
{ {
int i; int i;
@ -719,14 +719,14 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_re
if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq); if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++) for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
if (irq & kpio_irq_mask[j]) if (irq & kpio_irq_mask[j])
do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j, regs); do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
/* GPIO2 */ /* GPIO2 */
irq = H3800_ASIC2_GPIINTFLAG; irq = H3800_ASIC2_GPIINTFLAG;
if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq); if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++) for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
if (irq & gpio_irq_mask[j]) if (irq & gpio_irq_mask[j])
do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j , regs); do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
} }
if (i >= MAX_ASIC_ISR_LOOPS) if (i >= MAX_ASIC_ISR_LOOPS)

5
arch/arm/mach-sa1100/irq.c
View File

@ -110,8 +110,7 @@ static struct irq_chip sa1100_low_gpio_chip = {
* and call the handler. * and call the handler.
*/ */
static void static void
sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc, sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
unsigned int mask; unsigned int mask;
@ -128,7 +127,7 @@ sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc,
mask >>= 11; mask >>= 11;
do { do {
if (mask & 1) if (mask & 1)
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
mask >>= 1; mask >>= 1;
irq++; irq++;
desc++; desc++;

8
arch/arm/mach-sa1100/neponset.c
View File

@ -29,7 +29,7 @@
* is rather unfortunate. * is rather unfortunate.
*/ */
static void static void
neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) neponset_irq_handler(unsigned int irq, struct irqdesc *desc)
{ {
unsigned int irr; unsigned int irr;
@ -69,12 +69,12 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
if (irr & IRR_ETHERNET) { if (irr & IRR_ETHERNET) {
d = irq_desc + IRQ_NEPONSET_SMC9196; d = irq_desc + IRQ_NEPONSET_SMC9196;
desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs); desc_handle_irq(IRQ_NEPONSET_SMC9196, d);
} }
if (irr & IRR_USAR) { if (irr & IRR_USAR) {
d = irq_desc + IRQ_NEPONSET_USAR; d = irq_desc + IRQ_NEPONSET_USAR;
desc_handle_irq(IRQ_NEPONSET_USAR, d, regs); desc_handle_irq(IRQ_NEPONSET_USAR, d);
} }
desc->chip->unmask(irq); desc->chip->unmask(irq);
@ -82,7 +82,7 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
if (irr & IRR_SA1111) { if (irr & IRR_SA1111) {
d = irq_desc + IRQ_NEPONSET_SA1111; d = irq_desc + IRQ_NEPONSET_SA1111;
desc_handle_irq(IRQ_NEPONSET_SA1111, d, regs); desc_handle_irq(IRQ_NEPONSET_SA1111, d);
} }
} }
} }

2
arch/arm/mach-sa1100/ssp.c
View File

@ -25,7 +25,7 @@
#define TIMEOUT 100000 #define TIMEOUT 100000
static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t ssp_interrupt(int irq, void *dev_id)
{ {
unsigned int status = Ser4SSSR; unsigned int status = Ser4SSSR;

8
arch/arm/mach-sa1100/time.c
View File

@ -77,7 +77,7 @@ static int match_posponed;
#endif #endif
static irqreturn_t static irqreturn_t
sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) sa1100_timer_interrupt(int irq, void *dev_id)
{ {
unsigned int next_match; unsigned int next_match;
@ -99,7 +99,7 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
* handlers. * handlers.
*/ */
do { do {
timer_tick(regs); timer_tick();
OSSR = OSSR_M0; /* Clear match on timer 0 */ OSSR = OSSR_M0; /* Clear match on timer 0 */
next_match = (OSMR0 += LATCH); next_match = (OSMR0 += LATCH);
} while ((signed long)(next_match - OSCR) <= 0); } while ((signed long)(next_match - OSCR) <= 0);
@ -151,13 +151,13 @@ static void sa1100_dyn_tick_reprogram(unsigned long ticks)
} }
static irqreturn_t static irqreturn_t
sa1100_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs) sa1100_dyn_tick_handler(int irq, void *dev_id)
{ {
if (match_posponed) { if (match_posponed) {
match_posponed = 0; match_posponed = 0;
OSMR0 = initial_match; OSMR0 = initial_match;
if ((signed long)(initial_match - OSCR) <= 0) if ((signed long)(initial_match - OSCR) <= 0)
return sa1100_timer_interrupt(irq, dev_id, regs); return sa1100_timer_interrupt(irq, dev_id);
} }
return IRQ_NONE; return IRQ_NONE;
} }

4
arch/arm/mach-shark/core.c
View File

@ -80,10 +80,10 @@ static void __init shark_map_io(void)
#define HZ_TIME ((1193180 + HZ/2) / HZ) #define HZ_TIME ((1193180 + HZ/2) / HZ)
static irqreturn_t static irqreturn_t
shark_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) shark_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }

2
arch/arm/mach-shark/irq.c
View File

@ -61,7 +61,7 @@ static void shark_enable_8259A_irq(unsigned int irq)
static void shark_ack_8259A_irq(unsigned int irq){} static void shark_ack_8259A_irq(unsigned int irq){}
static irqreturn_t bogus_int(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t bogus_int(int irq, void *dev_id)
{ {
printk("Got interrupt %i!\n",irq); printk("Got interrupt %i!\n",irq);
return IRQ_NONE; return IRQ_NONE;

10
arch/arm/mach-versatile/core.c
View File

@ -77,12 +77,12 @@ static struct irq_chip sic_chip = {
}; };
static void static void
sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) sic_handle_irq(unsigned int irq, struct irqdesc *desc)
{ {
unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS); unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
if (status == 0) { if (status == 0) {
do_bad_IRQ(irq, desc, regs); do_bad_IRQ(irq, desc);
return; return;
} }
@ -93,7 +93,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
irq += IRQ_SIC_START; irq += IRQ_SIC_START;
desc = irq_desc + irq; desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs); desc_handle_irq(irq, desc);
} while (status); } while (status);
} }
@ -851,14 +851,14 @@ static unsigned long versatile_gettimeoffset(void)
/* /*
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
// ...clear the interrupt // ...clear the interrupt
writel(1, TIMER0_VA_BASE + TIMER_INTCLR); writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
timer_tick(regs); timer_tick();
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);

4
arch/arm/oprofile/op_model_xscale.c
View File

@ -341,7 +341,7 @@ static void inline __xsc2_check_ctrs(void)
__asm__ __volatile__ ("mcr p14, 0, %0, c5, c1, 0" : : "r" (flag)); __asm__ __volatile__ ("mcr p14, 0, %0, c5, c1, 0" : : "r" (flag));
} }
static irqreturn_t xscale_pmu_interrupt(int irq, void *arg, struct pt_regs *regs) static irqreturn_t xscale_pmu_interrupt(int irq, void *arg)
{ {
int i; int i;
u32 pmnc; u32 pmnc;
@ -356,7 +356,7 @@ static irqreturn_t xscale_pmu_interrupt(int irq, void *arg, struct pt_regs *regs
continue; continue;
write_counter(i, -(u32)results[i].reset_counter); write_counter(i, -(u32)results[i].reset_counter);
oprofile_add_sample(regs, i); oprofile_add_sample(get_irq_regs(), i);
results[i].ovf--; results[i].ovf--;
} }

4
arch/arm/plat-iop/time.c
View File

@ -47,7 +47,7 @@ unsigned long iop3xx_gettimeoffset(void)
} }
static irqreturn_t static irqreturn_t
iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) iop3xx_timer_interrupt(int irq, void *dev_id)
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
@ -57,7 +57,7 @@ iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
>= ticks_per_jiffy) { >= ticks_per_jiffy) {
timer_tick(regs); timer_tick();
next_jiffy_time -= ticks_per_jiffy; next_jiffy_time -= ticks_per_jiffy;
} }

9
arch/arm/plat-omap/dma.c
View File

@ -899,8 +899,7 @@ static int omap1_dma_handle_ch(int ch)
return 1; return 1;
} }
static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id, static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
struct pt_regs *regs)
{ {
int ch = ((int) dev_id) - 1; int ch = ((int) dev_id) - 1;
int handled = 0; int handled = 0;
@ -962,8 +961,7 @@ static int omap2_dma_handle_ch(int ch)
} }
/* STATUS register count is from 1-32 while our is 0-31 */ /* STATUS register count is from 1-32 while our is 0-31 */
static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id, static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
struct pt_regs *regs)
{ {
u32 val; u32 val;
int i; int i;
@ -1220,8 +1218,7 @@ static void set_b1_regs(void)
omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L); omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
} }
static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id, static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
struct pt_regs *regs)
{ {
u16 w; u16 w;

5
arch/arm/plat-omap/gpio.c
View File

@ -783,8 +783,7 @@ void omap_free_gpio(int gpio)
* line's interrupt handler has been run, we may miss some nested * line's interrupt handler has been run, we may miss some nested
* interrupts. * interrupts.
*/ */
static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc)
struct pt_regs *regs)
{ {
void __iomem *isr_reg = NULL; void __iomem *isr_reg = NULL;
u32 isr; u32 isr;
@ -882,7 +881,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
continue; continue;
} }
desc_handle_irq(gpio_irq, d, regs); desc_handle_irq(gpio_irq, d);
if (unlikely((d->status & IRQ_PENDING) && !d->depth)) { if (unlikely((d->status & IRQ_PENDING) && !d->depth)) {
irq_mask = 1 << irq_mask = 1 <<

4
arch/arm/plat-omap/mcbsp.c
View File

@ -96,7 +96,7 @@ static void omap_mcbsp_dump_reg(u8 id)
DBG("***********************\n"); DBG("***********************\n");
} }
static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
{ {
struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id);
@ -106,7 +106,7 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_re
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
{ {
struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id); struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id);

15
arch/arm/plat-omap/timer32k.c
View File

@ -194,8 +194,7 @@ unsigned long long sched_clock(void)
* issues with dynamic tick. In the dynamic tick case, we need to lock * issues with dynamic tick. In the dynamic tick case, we need to lock
* with irqsave. * with irqsave.
*/ */
static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id, static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
unsigned long now; unsigned long now;
@ -205,7 +204,7 @@ static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id,
while ((signed long)(now - omap_32k_last_tick) while ((signed long)(now - omap_32k_last_tick)
>= OMAP_32K_TICKS_PER_HZ) { >= OMAP_32K_TICKS_PER_HZ) {
omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
timer_tick(regs); timer_tick();
} }
/* Restart timer so we don't drift off due to modulo or dynamic tick. /* Restart timer so we don't drift off due to modulo or dynamic tick.
@ -218,19 +217,17 @@ static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id,
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id, static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id)
struct pt_regs *regs)
{ {
return _omap_32k_timer_interrupt(irq, dev_id, regs); return _omap_32k_timer_interrupt(irq, dev_id);
} }
static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id, static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
struct pt_regs *regs)
{ {
unsigned long flags; unsigned long flags;
write_seqlock_irqsave(&xtime_lock, flags); write_seqlock_irqsave(&xtime_lock, flags);
_omap_32k_timer_interrupt(irq, dev_id, regs); _omap_32k_timer_interrupt(irq, dev_id);
write_sequnlock_irqrestore(&xtime_lock, flags); write_sequnlock_irqrestore(&xtime_lock, flags);
return IRQ_HANDLED; return IRQ_HANDLED;

3
include/asm-arm/arch-clps711x/time.h
View File

@ -26,8 +26,9 @@ extern void clps711x_setup_timer(void);
* IRQ handler for the timer * IRQ handler for the timer
*/ */
static irqreturn_t static irqreturn_t
p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) p720t_timer_interrupt(int irq, void *dev_id)
{ {
struct pt_regs *regs = get_irq_regs();
do_leds(); do_leds();
do_timer(1); do_timer(1);
#ifndef CONFIG_SMP #ifndef CONFIG_SMP

8
include/asm-arm/arch-imx/imx-dma.h
View File

@ -45,8 +45,8 @@
struct imx_dma_channel { struct imx_dma_channel {
const char *name; const char *name;
void (*irq_handler) (int, void *, struct pt_regs *); void (*irq_handler) (int, void *);
void (*err_handler) (int, void *, struct pt_regs *, int errcode); void (*err_handler) (int, void *, int errcode);
void *data; void *data;
dmamode_t dma_mode; dmamode_t dma_mode;
struct scatterlist *sg; struct scatterlist *sg;
@ -77,8 +77,8 @@ imx_dma_setup_sg(imx_dmach_t dma_ch,
int int
imx_dma_setup_handlers(imx_dmach_t dma_ch, imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *), void (*irq_handler) (int, void *),
void (*err_handler) (int, void *, struct pt_regs *, int), void *data); void (*err_handler) (int, void *, int), void *data);
void imx_dma_enable(imx_dmach_t dma_ch); void imx_dma_enable(imx_dmach_t dma_ch);

3
include/asm-arm/arch-l7200/time.h
View File

@ -43,8 +43,9 @@
* Handler for RTC timer interrupt * Handler for RTC timer interrupt
*/ */
static irqreturn_t static irqreturn_t
timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) timer_interrupt(int irq, void *dev_id)
{ {
struct pt_regs *regs = get_irq_regs();
do_timer(1); do_timer(1);
#ifndef CONFIG_SMP #ifndef CONFIG_SMP
update_process_times(user_mode(regs)); update_process_times(user_mode(regs));

2
include/asm-arm/arch-pnx4008/dma.h
View File

@ -137,7 +137,7 @@ extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t);
extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *); extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *);
extern int pnx4008_request_channel(char *, int, extern int pnx4008_request_channel(char *, int,
void (*)(int, int, void *, struct pt_regs *), void (*)(int, int, void *),
void *); void *);
extern void pnx4008_free_channel(int); extern void pnx4008_free_channel(int);
extern int pnx4008_config_dma(int, int, int); extern int pnx4008_config_dma(int, int, int);

2
include/asm-arm/arch-pxa/dma.h
View File

@ -56,7 +56,7 @@ for ( \
int pxa_request_dma (char *name, int pxa_request_dma (char *name,
pxa_dma_prio prio, pxa_dma_prio prio,
void (*irq_handler)(int, void *, struct pt_regs *), void (*irq_handler)(int, void *),
void *data); void *data);
void pxa_free_dma (int dma_ch); void pxa_free_dma (int dma_ch);

2
include/asm-arm/arch-pxa/mmc.h
View File

@ -10,7 +10,7 @@ struct mmc_host;
struct pxamci_platform_data { struct pxamci_platform_data {
unsigned int ocr_mask; /* available voltages */ unsigned int ocr_mask; /* available voltages */
unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */
int (*init)(struct device *, irqreturn_t (*)(int, void *, struct pt_regs *), void *); int (*init)(struct device *, irqreturn_t (*)(int, void *), void *);
int (*get_ro)(struct device *); int (*get_ro)(struct device *);
void (*setpower)(struct device *, unsigned int); void (*setpower)(struct device *, unsigned int);
void (*exit)(struct device *, void *); void (*exit)(struct device *, void *);

6
include/asm-arm/hardware/sharpsl_pm.h
View File

@ -100,7 +100,7 @@ extern struct sharpsl_pm_status sharpsl_pm;
void sharpsl_battery_kick(void); void sharpsl_battery_kick(void);
void sharpsl_pm_led(int val); void sharpsl_pm_led(int val);
irqreturn_t sharpsl_ac_isr(int irq, void *dev_id, struct pt_regs *fp); irqreturn_t sharpsl_ac_isr(int irq, void *dev_id);
irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id, struct pt_regs *fp); irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id);
irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id, struct pt_regs *fp); irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id);

1
include/asm-arm/irq_regs.h Normal file
View File

@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>

9
include/asm-arm/mach/irq.h
View File

@ -30,10 +30,9 @@ extern int show_fiq_list(struct seq_file *, void *);
/* /*
* Obsolete inline function for calling irq descriptor handlers. * Obsolete inline function for calling irq descriptor handlers.
*/ */
static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc, static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc)
struct pt_regs *regs)
{ {
desc->handle_irq(irq, desc, regs); desc->handle_irq(irq, desc);
} }
void set_irq_flags(unsigned int irq, unsigned int flags); void set_irq_flags(unsigned int irq, unsigned int flags);
@ -51,10 +50,10 @@ void set_irq_flags(unsigned int irq, unsigned int flags);
#define irqdesc irq_desc #define irqdesc irq_desc
#define irqchip irq_chip #define irqchip irq_chip
#define do_bad_IRQ(irq,desc,regs) \ #define do_bad_IRQ(irq,desc) \
do { \ do { \
spin_lock(&desc->lock); \ spin_lock(&desc->lock); \
handle_bad_irq(irq, desc, regs); \ handle_bad_irq(irq, desc); \
spin_unlock(&desc->lock); \ spin_unlock(&desc->lock); \
} while(0) } while(0)

4
include/asm-arm/mach/time.h
View File

@ -57,7 +57,7 @@ struct dyn_tick_timer {
int (*enable)(void); /* Enables dynamic tick */ int (*enable)(void); /* Enables dynamic tick */
int (*disable)(void); /* Disables dynamic tick */ int (*disable)(void); /* Disables dynamic tick */
void (*reprogram)(unsigned long); /* Reprograms the timer */ void (*reprogram)(unsigned long); /* Reprograms the timer */
int (*handler)(int, void *, struct pt_regs *); int (*handler)(int, void *);
}; };
void timer_dyn_reprogram(void); void timer_dyn_reprogram(void);
@ -66,7 +66,7 @@ void timer_dyn_reprogram(void);
#endif #endif
extern struct sys_timer *system_timer; extern struct sys_timer *system_timer;
extern void timer_tick(struct pt_regs *); extern void timer_tick(void);
/* /*
* Kernel time keeping support. * Kernel time keeping support.