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drm/i915: Use simplest form for flushing the single cacheline in the HWS

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Rather than call a function to compute the matching cachelines and
clflush them, just call the clflush *instruction* directly. We also know
that we can use the unpatched plain clflush rather than the clflushopt
alternative.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460195877-20520-4-git-send-email-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2016-04-09 10:57:56 +01:00
parent 12471ba87a
commit 0d317ce99e
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/i915/intel_ringbuffer.h
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@ -385,8 +385,9 @@ intel_ring_sync_index(struct intel_engine_cs *engine,
static inline void
intel_flush_status_page(struct intel_engine_cs *engine, int reg)
{
drm_clflush_virt_range(&engine->status_page.page_addr[reg],
sizeof(uint32_t));
mb();
clflush(&engine->status_page.page_addr[reg]);
mb();
}
static inline u32