Staging: iio: Fixed block comments warning
Fixed the following warning: WARNING: Block comments use a trailing */ on a separate line Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -67,7 +67,8 @@
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#define LIS3L02DQ_REG_CTRL_2_THREE_WIRE_SPI_MODE 0x02
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/* Data alignment, default is 12 bit right justified
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* - option for 16 bit left justified */
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* - option for 16 bit left justified
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*/
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#define LIS3L02DQ_REG_CTRL_2_DATA_ALIGNMENT_16_BIT_LEFT_JUSTIFIED 0x01
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/* Interrupt related stuff */
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@ -77,7 +78,8 @@
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#define LIS3L02DQ_REG_WAKE_UP_CFG_BOOLEAN_AND 0x80
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/* Latch interrupt request,
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* if on ack must be given by reading the ack register */
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* if on ack must be given by reading the ack register
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*/
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#define LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC 0x40
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/* Z Interrupt on High (above threshold) */
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@ -94,7 +96,8 @@
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#define LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_LOW 0x01
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/* Register that gives description of what caused interrupt
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* - latched if set in CFG_ADDRES */
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* - latched if set in CFG_ADDRES
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*/
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#define LIS3L02DQ_REG_WAKE_UP_SRC_ADDR 0x24
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/* top bit ignored */
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/* Interrupt Active */
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@ -123,7 +126,8 @@
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#define LIS3L02DQ_REG_STATUS_X_NEW_DATA 0x01
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/* The accelerometer readings - low and high bytes.
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* Form of high byte dependent on justification set in ctrl reg */
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* Form of high byte dependent on justification set in ctrl reg
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*/
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#define LIS3L02DQ_REG_OUT_X_L_ADDR 0x28
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#define LIS3L02DQ_REG_OUT_X_H_ADDR 0x29
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#define LIS3L02DQ_REG_OUT_Y_L_ADDR 0x2A
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@ -132,7 +136,8 @@
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#define LIS3L02DQ_REG_OUT_Z_H_ADDR 0x2D
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/* Threshold values for all axes and both above and below thresholds
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* - i.e. there is only one value */
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* - i.e. there is only one value
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*/
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#define LIS3L02DQ_REG_THS_L_ADDR 0x2E
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#define LIS3L02DQ_REG_THS_H_ADDR 0x2F
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