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Merge branch 'r8169-fixes'

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Chunhao Lin says:

====================
r8169: fix dmar pte write access is not set error

This series fixes dmar pte write access is not set error.

Chunhao Lin (2):
  r8169: move rtl_wol_enable_rx() and rtl_prepare_power_down()
  r8169: fix dmar pte write access is not set error

v2:
-update commit message
-adjust the code according to current kernel code
v3:
-update title and commit message
-split the patch
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2022-12-28 11:58:08 +00:00
commit 0e3d18359a
1 changed files with 29 additions and 29 deletions
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58
drivers/net/ethernet/realtek/r8169_main.c
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@ -2210,28 +2210,6 @@ static int rtl_set_mac_address(struct net_device *dev, void *p)
return 0;
}
static void rtl_wol_enable_rx(struct rtl8169_private *tp)
{
if (tp->mac_version >= RTL_GIGA_MAC_VER_25)
RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
}
static void rtl_prepare_power_down(struct rtl8169_private *tp)
{
if (tp->dash_type != RTL_DASH_NONE)
return;
if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
tp->mac_version == RTL_GIGA_MAC_VER_33)
rtl_ephy_write(tp, 0x19, 0xff64);
if (device_may_wakeup(tp_to_dev(tp))) {
phy_speed_down(tp->phydev, false);
rtl_wol_enable_rx(tp);
}
}
static void rtl_init_rxcfg(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
@ -2455,6 +2433,31 @@ static void rtl_enable_rxdvgate(struct rtl8169_private *tp)
rtl_wait_txrx_fifo_empty(tp);
}
static void rtl_wol_enable_rx(struct rtl8169_private *tp)
{
if (tp->mac_version >= RTL_GIGA_MAC_VER_25)
RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
if (tp->mac_version >= RTL_GIGA_MAC_VER_40)
rtl_disable_rxdvgate(tp);
}
static void rtl_prepare_power_down(struct rtl8169_private *tp)
{
if (tp->dash_type != RTL_DASH_NONE)
return;
if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
tp->mac_version == RTL_GIGA_MAC_VER_33)
rtl_ephy_write(tp, 0x19, 0xff64);
if (device_may_wakeup(tp_to_dev(tp))) {
phy_speed_down(tp->phydev, false);
rtl_wol_enable_rx(tp);
}
}
static void rtl_set_tx_config_registers(struct rtl8169_private *tp)
{
u32 val = TX_DMA_BURST << TxDMAShift |
@ -3872,7 +3875,7 @@ static void rtl8169_tx_clear(struct rtl8169_private *tp)
netdev_reset_queue(tp->dev);
}
static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
static void rtl8169_cleanup(struct rtl8169_private *tp)
{
napi_disable(&tp->napi);
@ -3884,9 +3887,6 @@ static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
rtl_rx_close(tp);
if (going_down && tp->dev->wol_enabled)
goto no_reset;
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_28:
case RTL_GIGA_MAC_VER_31:
@ -3907,7 +3907,7 @@ static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
}
rtl_hw_reset(tp);
no_reset:
rtl8169_tx_clear(tp);
rtl8169_init_ring_indexes(tp);
}
@ -3918,7 +3918,7 @@ static void rtl_reset_work(struct rtl8169_private *tp)
netif_stop_queue(tp->dev);
rtl8169_cleanup(tp, false);
rtl8169_cleanup(tp);
for (i = 0; i < NUM_RX_DESC; i++)
rtl8169_mark_to_asic(tp->RxDescArray + i);
@ -4605,7 +4605,7 @@ static void rtl8169_down(struct rtl8169_private *tp)
pci_clear_master(tp->pci_dev);
rtl_pci_commit(tp);
rtl8169_cleanup(tp, true);
rtl8169_cleanup(tp);
rtl_disable_exit_l1(tp);
rtl_prepare_power_down(tp);
}