gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler()
The mx3_gpio_irq_handler() is also called on imx6q which has GIC as the primary interrupt controller. As GIC implements the fasteoi flow control, we need to add chained_irq_enter/exit() to mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang whenever there is a gpio irq triggered. v2: use chained_irq_{enter,exit}() Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
parent
479a0c7eee
commit
0e44b6eccf
@ -30,6 +30,7 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <asm-generic/bug.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
enum mxc_gpio_hwtype {
|
||||
IMX1_GPIO, /* runs on i.mx1 */
|
||||
@ -232,10 +233,15 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
|
||||
{
|
||||
u32 irq_stat;
|
||||
struct mxc_gpio_port *port = irq_get_handler_data(irq);
|
||||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
|
||||
|
||||
mxc_gpio_irq_handler(port, irq_stat);
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
/* MX2 has one interrupt *for all* gpio ports */
|
||||
|
Loading…
Reference in New Issue
Block a user