sparc64: Use 'ILOG2_4MB' instead of constant '22'.
Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -918,7 +918,7 @@ static inline bool kern_addr_valid(unsigned long addr)
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if ((paddr >> MAX_PHYS_ADDRESS_BITS) != 0UL)
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if ((paddr >> MAX_PHYS_ADDRESS_BITS) != 0UL)
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return false;
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return false;
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return test_bit(paddr >> 22, sparc64_valid_addr_bitmap);
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return test_bit(paddr >> ILOG2_4MB, sparc64_valid_addr_bitmap);
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}
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}
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extern int page_in_phys_avail(unsigned long paddr);
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extern int page_in_phys_avail(unsigned long paddr);
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@ -282,8 +282,8 @@ sun4v_chip_type:
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stx %l2, [%l4 + 0x0]
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stx %l2, [%l4 + 0x0]
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ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low
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ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low
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/* 4MB align */
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/* 4MB align */
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srlx %l3, 22, %l3
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srlx %l3, ILOG2_4MB, %l3
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sllx %l3, 22, %l3
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sllx %l3, ILOG2_4MB, %l3
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stx %l3, [%l4 + 0x8]
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stx %l3, [%l4 + 0x8]
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/* Leave service as-is, "call-method" */
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/* Leave service as-is, "call-method" */
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@ -277,7 +277,7 @@ kvmap_dtlb_load:
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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kvmap_vmemmap:
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kvmap_vmemmap:
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sub %g4, %g5, %g5
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sub %g4, %g5, %g5
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srlx %g5, 22, %g5
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srlx %g5, ILOG2_4MB, %g5
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sethi %hi(vmemmap_table), %g1
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sethi %hi(vmemmap_table), %g1
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sllx %g5, 3, %g5
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sllx %g5, 3, %g5
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or %g1, %lo(vmemmap_table), %g1
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or %g1, %lo(vmemmap_table), %g1
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@ -588,7 +588,7 @@ static void __init remap_kernel(void)
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int i, tlb_ent = sparc64_highest_locked_tlbent();
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int i, tlb_ent = sparc64_highest_locked_tlbent();
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tte_vaddr = (unsigned long) KERNBASE;
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tte_vaddr = (unsigned long) KERNBASE;
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phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
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phys_page = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
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tte_data = kern_large_tte(phys_page);
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tte_data = kern_large_tte(phys_page);
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kern_locked_tte_data = tte_data;
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kern_locked_tte_data = tte_data;
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@ -1881,7 +1881,7 @@ void __init paging_init(void)
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BUILD_BUG_ON(NR_CPUS > 4096);
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BUILD_BUG_ON(NR_CPUS > 4096);
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kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
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kern_base = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
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kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
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kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
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/* Invalidate both kernel TSBs. */
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/* Invalidate both kernel TSBs. */
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@ -1937,7 +1937,7 @@ void __init paging_init(void)
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shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
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shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
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real_end = (unsigned long)_end;
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real_end = (unsigned long)_end;
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num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << 22);
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num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << ILOG2_4MB);
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printk("Kernel: Using %d locked TLB entries for main kernel image.\n",
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printk("Kernel: Using %d locked TLB entries for main kernel image.\n",
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num_kernel_image_mappings);
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num_kernel_image_mappings);
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@ -2094,7 +2094,7 @@ static void __init setup_valid_addr_bitmap_from_pavail(unsigned long *bitmap)
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if (new_start <= old_start &&
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if (new_start <= old_start &&
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new_end >= (old_start + PAGE_SIZE)) {
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new_end >= (old_start + PAGE_SIZE)) {
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set_bit(old_start >> 22, bitmap);
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set_bit(old_start >> ILOG2_4MB, bitmap);
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goto do_next_page;
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goto do_next_page;
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}
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}
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}
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}
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@ -2143,7 +2143,7 @@ void __init mem_init(void)
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addr = PAGE_OFFSET + kern_base;
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addr = PAGE_OFFSET + kern_base;
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last = PAGE_ALIGN(kern_size) + addr;
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last = PAGE_ALIGN(kern_size) + addr;
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while (addr < last) {
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while (addr < last) {
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set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap);
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set_bit(__pa(addr) >> ILOG2_4MB, sparc64_valid_addr_bitmap);
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addr += PAGE_SIZE;
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addr += PAGE_SIZE;
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}
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}
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@ -2267,7 +2267,7 @@ int __meminit vmemmap_populate(unsigned long vstart, unsigned long vend,
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void *block;
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void *block;
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if (!(*vmem_pp & _PAGE_VALID)) {
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if (!(*vmem_pp & _PAGE_VALID)) {
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block = vmemmap_alloc_block(1UL << 22, node);
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block = vmemmap_alloc_block(1UL << ILOG2_4MB, node);
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if (!block)
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if (!block)
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return -ENOMEM;
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return -ENOMEM;
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