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mt76: mt7603: fix initialization of max rx length

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The previous version only accidentally disabled A-MSDU deaggregation by
using the wrong mask for rx length configuration, which left previous
length value in place.
Fix the length and initialize the register completely to keep A-MSDU
de-aggregation remaining disabled

Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Felix Fietkau 2019-03-08 19:50:21 +01:00
parent 6fe5333787
commit 0f66947bff
2 changed files with 6 additions and 1 deletions
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3
drivers/net/wireless/mediatek/mt76/mt7603/init.c
View File

@ -167,7 +167,8 @@ mt7603_mac_init(struct mt7603_dev *dev)
FIELD_PREP(MT_AGG_RETRY_CONTROL_BAR_LIMIT, 1) |
FIELD_PREP(MT_AGG_RETRY_CONTROL_RTS_LIMIT, 15));
mt76_rmw(dev, MT_DMA_DCR0, ~0xfffc, 4096);
mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP |
FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 4096));
mt76_rmw(dev, MT_DMA_VCFR0, BIT(0), BIT(13));
mt76_rmw(dev, MT_DMA_TMCFR0, BIT(0) | BIT(1), BIT(13));

4
drivers/net/wireless/mediatek/mt76/mt7603/regs.h
View File

@ -233,6 +233,10 @@
#define MT_WF_DMA(ofs) (MT_WF_DMA_BASE + (ofs))
#define MT_DMA_DCR0 MT_WF_DMA(0x000)
#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 0)
#define MT_DMA_DCR0_DAMSDU BIT(16)
#define MT_DMA_DCR0_RX_VEC_DROP BIT(17)
#define MT_DMA_DCR1 MT_WF_DMA(0x004)
#define MT_DMA_FQCR0 MT_WF_DMA(0x008)