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ARM: consolidate SMP cross call implementation

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Rather than having each platform class provide a mach/smp.h header for
smp_cross_call(), arrange for them to register the function with the
core ARM SMP code instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2011-04-03 13:01:30 +01:00
parent 43b3e18982
commit 0f7b332f97
19 changed files with 37 additions and 162 deletions
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6
arch/arm/include/asm/smp.h
View File

@ -14,8 +14,6 @@
#include <linux/cpumask.h> #include <linux/cpumask.h>
#include <linux/thread_info.h> #include <linux/thread_info.h>
#include <mach/smp.h>
#ifndef CONFIG_SMP #ifndef CONFIG_SMP
# error "<asm/smp.h> included in non-SMP build" # error "<asm/smp.h> included in non-SMP build"
#endif #endif
@ -47,9 +45,9 @@ extern void smp_init_cpus(void);
/* /*
* Raise an IPI cross call on CPUs in callmap. * Provide a function to raise an IPI cross call on CPUs in callmap.
*/ */
extern void smp_cross_call(const struct cpumask *mask, int ipi); extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
/* /*
* Boot a secondary CPU, and assign it the specified idle task. * Boot a secondary CPU, and assign it the specified idle task.

7
arch/arm/kernel/smp.c
View File

@ -376,6 +376,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
} }
} }
static void (*smp_cross_call)(const struct cpumask *, unsigned int);
void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
{
smp_cross_call = fn;
}
void arch_send_call_function_ipi_mask(const struct cpumask *mask) void arch_send_call_function_ipi_mask(const struct cpumask *mask)
{ {
smp_cross_call(mask, IPI_CALL_FUNC); smp_cross_call(mask, IPI_CALL_FUNC);

19
arch/arm/mach-exynos4/include/mach/smp.h
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@ -1,19 +0,0 @@
/* linux/arch/arm/mach-exynos4/include/mach/smp.h
*
* Cloned from arch/arm/mach-realview/include/mach/smp.h
*/
#ifndef ASM_ARCH_SMP_H
#define ASM_ARCH_SMP_H __FILE__
#include <asm/hardware/gic.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

5
arch/arm/mach-exynos4/platsmp.c
View File

@ -22,6 +22,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/unified.h> #include <asm/unified.h>
@ -104,7 +105,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* the boot monitor to read the system wide flags register, * the boot monitor to read the system wide flags register,
* and branch to the address found there. * and branch to the address found there.
*/ */
smp_cross_call(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
@ -147,6 +148,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

23
arch/arm/mach-msm/include/mach/smp.h
View File

@ -1,23 +0,0 @@
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_MSM_SMP_H
#define __ASM_ARCH_MSM_SMP_H
#include <asm/hardware/gic.h>
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

4
arch/arm/mach-msm/platsmp.c
View File

@ -119,7 +119,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* the boot monitor to read the system wide flags register, * the boot monitor to read the system wide flags register,
* and branch to the address found there. * and branch to the address found there.
*/ */
smp_cross_call(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
@ -151,6 +151,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < NR_CPUS; i++) for (i = 0; i < NR_CPUS; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

5
arch/arm/mach-omap2/omap-smp.c
View File

@ -21,6 +21,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/omap4-common.h> #include <mach/omap4-common.h>
@ -63,7 +64,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
omap_modify_auxcoreboot0(0x200, 0xfffffdff); omap_modify_auxcoreboot0(0x200, 0xfffffdff);
flush_cache_all(); flush_cache_all();
smp_wmb(); smp_wmb();
smp_cross_call(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
/* /*
* Now the secondary core is starting up let it run its * Now the secondary core is starting up let it run its
@ -118,6 +119,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

14
arch/arm/mach-realview/include/mach/smp.h
View File

@ -1,14 +0,0 @@
#ifndef ASMARM_ARCH_SMP_H
#define ASMARM_ARCH_SMP_H
#include <asm/hardware/gic.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

3
arch/arm/mach-realview/platsmp.c
View File

@ -14,6 +14,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/unified.h> #include <asm/unified.h>
@ -61,6 +62,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

16
arch/arm/mach-shmobile/include/mach/smp.h
View File

@ -1,16 +0,0 @@
#ifndef __MACH_SMP_H
#define __MACH_SMP_H
#include <asm/hardware/gic.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
#if defined(CONFIG_ARM_GIC)
gic_raise_softirq(mask, ipi);
#endif
}
#endif

3
arch/arm/mach-shmobile/platsmp.c
View File

@ -16,6 +16,7 @@
#include <linux/device.h> #include <linux/device.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/io.h> #include <linux/io.h>
#include <asm/hardware/gic.h>
#include <asm/localtimer.h> #include <asm/localtimer.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <mach/common.h> #include <mach/common.h>
@ -57,6 +58,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

14
arch/arm/mach-tegra/include/mach/smp.h
View File

@ -1,14 +0,0 @@
#ifndef ASMARM_ARCH_SMP_H
#define ASMARM_ARCH_SMP_H
#include <asm/hardware/gic.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

3
arch/arm/mach-tegra/platsmp.c
View File

@ -20,6 +20,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
@ -122,6 +123,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
cpu_set(i, cpu_possible_map); cpu_set(i, cpu_possible_map);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

24
arch/arm/mach-ux500/include/mach/smp.h
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@ -1,24 +0,0 @@
/*
* This file is based ARM realview platform.
* Copyright (C) ARM Limited.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef ASMARM_ARCH_SMP_H
#define ASMARM_ARCH_SMP_H
#include <asm/hardware/gic.h>
/* This is required to wakeup the secondary core */
extern void u8500_secondary_startup(void);
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

5
arch/arm/mach-ux500/platsmp.c
View File

@ -18,6 +18,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/setup.h> #include <mach/setup.h>
@ -94,7 +95,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
*/ */
write_pen_release(cpu); write_pen_release(cpu);
smp_cross_call(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
@ -162,6 +163,8 @@ void __init smp_init_cpus(void)
for (i = 0; i < ncores; i++) for (i = 0; i < ncores; i++)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
void __init platform_smp_prepare_cpus(unsigned int max_cpus) void __init platform_smp_prepare_cpus(unsigned int max_cpus)

2
arch/arm/mach-vexpress/ct-ca9x4.c
View File

@ -210,6 +210,8 @@ static void ct_ca9x4_init_cpu_map(void)
for (i = 0; i < ncores; ++i) for (i = 0; i < ncores; ++i)
set_cpu_possible(i, true); set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
} }
static void ct_ca9x4_smp_enable(unsigned int max_cpus) static void ct_ca9x4_smp_enable(unsigned int max_cpus)

13
arch/arm/mach-vexpress/include/mach/smp.h
View File

@ -1,13 +0,0 @@
#ifndef __MACH_SMP_H
#define __MACH_SMP_H
#include <asm/hardware/gic.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

30
arch/arm/plat-omap/include/plat/smp.h
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@ -1,30 +0,0 @@
/*
* OMAP4 machine specific smp.h
*
* Copyright (C) 2009 Texas Instruments, Inc.
*
* Author:
* Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* Interface functions needed for the SMP. This file is based on arm
* realview smp platform.
* Copyright (c) 2003 ARM Limited.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef OMAP_ARCH_SMP_H
#define OMAP_ARCH_SMP_H
#include <asm/hardware/gic.h>
/*
* We use Soft IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
gic_raise_softirq(mask, ipi);
}
#endif

3
arch/arm/plat-versatile/platsmp.c
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@ -16,6 +16,7 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
/* /*
* control for which core is the next to come out of the secondary * control for which core is the next to come out of the secondary
@ -83,7 +84,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* the boot monitor to read the system wide flags register, * the boot monitor to read the system wide flags register,
* and branch to the address found there. * and branch to the address found there.
*/ */
smp_cross_call(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {