Merge branch 'bnxt_en-bug-fixes'
Michael Chan says: ==================== bnxt_en: Bug fixes. These 5 bug fixes are all related to the firmware reset or AER recovery. 2 patches fix the cleanup logic for the workqueue used to handle firmware reset and recovery. 1 patch ensures that the chip will have the proper BAR addresses latched after fatal AER recovery. 1 patch fixes the open path to check for firmware reset abort error. The last one sends the fw reset command unconditionally to fix the AER reset logic. ==================== Link: https://lore.kernel.org/r/1603685901-17917-1-git-send-email-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
10067b5019
@ -1160,16 +1160,6 @@ static void bnxt_queue_sp_work(struct bnxt *bp)
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schedule_work(&bp->sp_task);
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}
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static void bnxt_cancel_sp_work(struct bnxt *bp)
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{
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if (BNXT_PF(bp)) {
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flush_workqueue(bnxt_pf_wq);
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} else {
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cancel_work_sync(&bp->sp_task);
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cancel_delayed_work_sync(&bp->fw_reset_task);
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}
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}
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static void bnxt_sched_reset(struct bnxt *bp, struct bnxt_rx_ring_info *rxr)
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{
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if (!rxr->bnapi->in_reset) {
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@ -4362,7 +4352,8 @@ static int bnxt_hwrm_do_send_msg(struct bnxt *bp, void *msg, u32 msg_len,
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u32 bar_offset = BNXT_GRCPF_REG_CHIMP_COMM;
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u16 dst = BNXT_HWRM_CHNL_CHIMP;
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if (BNXT_NO_FW_ACCESS(bp))
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if (BNXT_NO_FW_ACCESS(bp) &&
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le16_to_cpu(req->req_type) != HWRM_FUNC_RESET)
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return -EBUSY;
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if (msg_len > BNXT_HWRM_MAX_REQ_LEN) {
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@ -9789,6 +9780,9 @@ int bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)
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{
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int rc = 0;
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if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state))
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rc = -EIO;
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if (!rc)
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rc = __bnxt_open_nic(bp, irq_re_init, link_re_init);
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if (rc) {
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netdev_err(bp->dev, "nic open fail (rc: %x)\n", rc);
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@ -12108,15 +12102,17 @@ static void bnxt_remove_one(struct pci_dev *pdev)
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if (BNXT_PF(bp))
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bnxt_sriov_disable(bp);
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clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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bnxt_cancel_sp_work(bp);
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bp->sp_event = 0;
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bnxt_dl_fw_reporters_destroy(bp, true);
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if (BNXT_PF(bp))
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devlink_port_type_clear(&bp->dl_port);
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pci_disable_pcie_error_reporting(pdev);
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unregister_netdev(dev);
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clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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/* Flush any pending tasks */
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cancel_work_sync(&bp->sp_task);
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cancel_delayed_work_sync(&bp->fw_reset_task);
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bp->sp_event = 0;
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bnxt_dl_fw_reporters_destroy(bp, true);
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bnxt_dl_unregister(bp);
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bnxt_shutdown_tc(bp);
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@ -12860,6 +12856,9 @@ static pci_ers_result_t bnxt_io_error_detected(struct pci_dev *pdev,
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return PCI_ERS_RESULT_DISCONNECT;
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}
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if (state == pci_channel_io_frozen)
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set_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state);
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if (netif_running(netdev))
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bnxt_close(netdev);
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@ -12886,7 +12885,7 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev)
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{
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struct net_device *netdev = pci_get_drvdata(pdev);
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struct bnxt *bp = netdev_priv(netdev);
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int err = 0;
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int err = 0, off;
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pci_ers_result_t result = PCI_ERS_RESULT_DISCONNECT;
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netdev_info(bp->dev, "PCI Slot Reset\n");
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@ -12898,6 +12897,20 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev)
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"Cannot re-enable PCI device after reset.\n");
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} else {
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pci_set_master(pdev);
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/* Upon fatal error, our device internal logic that latches to
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* BAR value is getting reset and will restore only upon
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* rewritting the BARs.
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*
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* As pci_restore_state() does not re-write the BARs if the
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* value is same as saved value earlier, driver needs to
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* write the BARs to 0 to force restore, in case of fatal error.
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*/
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if (test_and_clear_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN,
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&bp->state)) {
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for (off = PCI_BASE_ADDRESS_0;
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off <= PCI_BASE_ADDRESS_5; off += 4)
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pci_write_config_dword(bp->pdev, off, 0);
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}
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pci_restore_state(pdev);
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pci_save_state(pdev);
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@ -1781,6 +1781,7 @@ struct bnxt {
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#define BNXT_STATE_ABORT_ERR 5
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#define BNXT_STATE_FW_FATAL_COND 6
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#define BNXT_STATE_DRV_REGISTERED 7
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#define BNXT_STATE_PCI_CHANNEL_IO_FROZEN 8
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#define BNXT_NO_FW_ACCESS(bp) \
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(test_bit(BNXT_STATE_FW_FATAL_COND, &(bp)->state) || \
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