perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on ICX
This patch enables I/O stacks to IIO PMON mapping on Icelake server. Mapping of IDs in SAD_CONTROL_CFG notation to IDs in PMON notation for Icelake server: Stack Name | CBDMA/DMI | PCIe_1 | PCIe_2 | PCIe_3 | PCIe_4 | PCIe_5 SAD_CONTROL_CFG ID | 0 | 1 | 2 | 3 | 4 | 5 PMON ID | 5 | 0 | 1 | 2 | 3 | 4 I/O stacks to IIO PMON mapping is exposed through attributes /sys/devices/uncore_iio_<pmu_idx>/dieX, where dieX is file which holds "Segment:Root Bus" for PCIe root port which can be monitored by that IIO PMON block. Example for 2-S Icelake server: ==> /sys/devices/uncore_iio_0/die0 <== 0000:16 ==> /sys/devices/uncore_iio_0/die1 <== 0000:97 ==> /sys/devices/uncore_iio_1/die0 <== 0000:30 ==> /sys/devices/uncore_iio_1/die1 <== 0000:b0 ==> /sys/devices/uncore_iio_3/die0 <== 0000:4a ==> /sys/devices/uncore_iio_3/die1 <== 0000:c9 ==> /sys/devices/uncore_iio_4/die0 <== 0000:64 ==> /sys/devices/uncore_iio_4/die1 <== 0000:e2 ==> /sys/devices/uncore_iio_5/die0 <== 0000:00 ==> /sys/devices/uncore_iio_5/die1 <== 0000:80 Signed-off-by: Alexander Antonov <alexander.antonov@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Link: https://lkml.kernel.org/r/20210426131614.16205-4-alexander.antonov@linux.intel.com
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@ -5041,6 +5041,53 @@ static struct event_constraint icx_uncore_iio_constraints[] = {
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EVENT_CONSTRAINT_END
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};
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static umode_t
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icx_iio_mapping_visible(struct kobject *kobj, struct attribute *attr, int die)
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{
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/* Root bus 0x00 is valid only for pmu_idx = 5. */
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return pmu_iio_mapping_visible(kobj, attr, die, 5);
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}
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static struct attribute_group icx_iio_mapping_group = {
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.is_visible = icx_iio_mapping_visible,
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};
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static const struct attribute_group *icx_iio_attr_update[] = {
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&icx_iio_mapping_group,
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NULL,
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};
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/*
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* ICX has a static mapping of stack IDs from SAD_CONTROL_CFG notation to PMON
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*/
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enum {
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ICX_PCIE1_PMON_ID,
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ICX_PCIE2_PMON_ID,
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ICX_PCIE3_PMON_ID,
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ICX_PCIE4_PMON_ID,
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ICX_PCIE5_PMON_ID,
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ICX_CBDMA_DMI_PMON_ID
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};
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static u8 icx_sad_pmon_mapping[] = {
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ICX_CBDMA_DMI_PMON_ID,
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ICX_PCIE1_PMON_ID,
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ICX_PCIE2_PMON_ID,
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ICX_PCIE3_PMON_ID,
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ICX_PCIE4_PMON_ID,
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ICX_PCIE5_PMON_ID,
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};
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static int icx_iio_get_topology(struct intel_uncore_type *type)
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{
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return sad_cfg_iio_topology(type, icx_sad_pmon_mapping);
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}
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static int icx_iio_set_mapping(struct intel_uncore_type *type)
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{
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return pmu_iio_set_mapping(type, &icx_iio_mapping_group);
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}
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static struct intel_uncore_type icx_uncore_iio = {
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.name = "iio",
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.num_counters = 4,
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@ -5055,6 +5102,10 @@ static struct intel_uncore_type icx_uncore_iio = {
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.constraints = icx_uncore_iio_constraints,
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.ops = &skx_uncore_iio_ops,
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.format_group = &snr_uncore_iio_format_group,
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.attr_update = icx_iio_attr_update,
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.get_topology = icx_iio_get_topology,
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.set_mapping = icx_iio_set_mapping,
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.cleanup_mapping = skx_iio_cleanup_mapping,
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};
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static struct intel_uncore_type icx_uncore_irp = {
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