soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset
According to documentation, it has increments of 4, not 8. Fixes: c72ca343f911 ("soc: qcom: llcc: Add v4.1 HW version support") Reported-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com> Reviewed-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231012160509.184891-1-abel.vesa@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -47,7 +47,7 @@
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#define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K)
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#define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
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#define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
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#define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_8 * n)
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#define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
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#define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
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#define LLCC_TRP_PCB_ACT 0x21f04
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