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mm: generalise COW SMC TLB flushing race comment

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I'm not sure if I'm completely missing something here, but AFAIKS the
reference to the mysterious "COW SMC race" confuses the issue.  The
original changelog and mailing list thread didn't help me either.

This SMC race is where the problem was detected, but isn't the general
problem bigger and more obvious: that the new PTE could be picked up at
any time by any TLB while entries for the old PTE exist in other TLBs
before the TLB flush takes effect?

The case where the iTLB and dTLB of a CPU are pointing at different pages
is an interesting one but follows from the general problem.

The other (minor) thing with the comment I think it makes it a bit clearer
to say what the old code was doing (i.e., it avoids the race as opposed to
what?).

References: 4ce072f1fa ("mm: fix a race condition under SMC + COW")
Link: https://lkml.kernel.org/r/20201215121119.351650-1-npiggin@gmail.com
Reviewed-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Hugh Dickins <hughd@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suresh Siddha <sbsiddha@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Nicholas Piggin 2020-12-29 15:14:43 -08:00 committed by Linus Torvalds
parent e05986ee7a
commit 111fe7186b
1 changed files with 5 additions and 3 deletions
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8
mm/memory.c
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@ -2892,11 +2892,13 @@ static vm_fault_t wp_page_copy(struct vm_fault *vmf)
entry = mk_pte(new_page, vma->vm_page_prot); entry = mk_pte(new_page, vma->vm_page_prot);
entry = pte_sw_mkyoung(entry); entry = pte_sw_mkyoung(entry);
entry = maybe_mkwrite(pte_mkdirty(entry), vma); entry = maybe_mkwrite(pte_mkdirty(entry), vma);
/* /*
* Clear the pte entry and flush it first, before updating the * Clear the pte entry and flush it first, before updating the
* pte with the new entry. This will avoid a race condition * pte with the new entry, to keep TLBs on different CPUs in
* seen in the presence of one thread doing SMC and another * sync. This code used to set the new PTE then flush TLBs, but
* thread doing COW. * that left a window where the new PTE could be loaded into
* some TLBs while the old PTE remains in others.
*/ */
ptep_clear_flush_notify(vma, vmf->address, vmf->pte); ptep_clear_flush_notify(vma, vmf->address, vmf->pte);
page_add_new_anon_rmap(new_page, vma, vmf->address, false); page_add_new_anon_rmap(new_page, vma, vmf->address, false);