drm/amdgpu: add smu_v11_8_ppsmc header for cyan_skilfish
Add smu_v11_8_ppsmc.h for cyan_skilfish. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drivers/gpu/drm/amd/pm/inc/smu_v11_8_ppsmc.h
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drivers/gpu/drm/amd/pm/inc/smu_v11_8_ppsmc.h
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/*
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* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef SMU_11_8_0_PPSMC_H
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#define SMU_11_8_0_PPSMC_H
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// SMU Response Codes:
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#define PPSMC_Result_OK 0x1
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#define PPSMC_Result_Failed 0xFF
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#define PPSMC_Result_UnknownCmd 0xFE
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#define PPSMC_Result_CmdRejectedPrereq 0xFD
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#define PPSMC_Result_CmdRejectedBusy 0xFC
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// Message Definitions:
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#define PPSMC_MSG_TestMessage 0x1
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#define PPSMC_MSG_GetSmuVersion 0x2
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#define PPSMC_MSG_GetDriverIfVersion 0x3
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#define PPSMC_MSG_SetDriverTableDramAddrHigh 0x4
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#define PPSMC_MSG_SetDriverTableDramAddrLow 0x5
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#define PPSMC_MSG_TransferTableSmu2Dram 0x6
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#define PPSMC_MSG_TransferTableDram2Smu 0x7
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#define PPSMC_MSG_Rsvd1 0xA
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#define PPSMC_MSG_RequestCorePstate 0xB
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#define PPSMC_MSG_QueryCorePstate 0xC
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#define PPSMC_MSG_Rsvd2 0xD
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#define PPSMC_MSG_RequestGfxclk 0xE
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#define PPSMC_MSG_QueryGfxclk 0xF
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#define PPSMC_MSG_QueryVddcrSocClock 0x11
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#define PPSMC_MSG_QueryDfPstate 0x13
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#define PPSMC_MSG_Rsvd3 0x14
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#define PPSMC_MSG_ConfigureS3PwrOffRegisterAddressHigh 0x16
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#define PPSMC_MSG_ConfigureS3PwrOffRegisterAddressLow 0x17
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#define PPSMC_MSG_RequestActiveWgp 0x18
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#define PPSMC_MSG_SetMinDeepSleepGfxclkFreq 0x19
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#define PPSMC_MSG_SetMaxDeepSleepDfllGfxDiv 0x1A
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#define PPSMC_MSG_StartTelemetryReporting 0x1B
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#define PPSMC_MSG_StopTelemetryReporting 0x1C
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#define PPSMC_MSG_ClearTelemetryMax 0x1D
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#define PPSMC_MSG_QueryActiveWgp 0x1E
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#define PPSMC_MSG_SetCoreEnableMask 0x2C
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#define PPSMC_MSG_InitiateGcRsmuSoftReset 0x2E
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#define PPSMC_MSG_GfxCacWeightOperation 0x2F
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#define PPSMC_MSG_L3CacWeightOperation 0x30
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#define PPSMC_MSG_PackCoreCacWeight 0x31
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#define PPSMC_MSG_SetDriverTableVMID 0x34
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#define PPSMC_MSG_SetSoftMinCclk 0x35
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#define PPSMC_MSG_SetSoftMaxCclk 0x36
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#define PPSMC_Message_Count 0x37
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#endif
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