media: ar0521: Add V4L2_CID_ANALOG_GAIN
Add support for V4L2_CID_ANALOG_GAIN. The control programs the global gain register which applies to all color channels. Signed-off-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -35,6 +35,11 @@
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#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
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#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
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#define AR0521_TOTAL_WIDTH_MIN 2968u
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#define AR0521_TOTAL_WIDTH_MIN 2968u
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#define AR0521_ANA_GAIN_MIN 0x00
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#define AR0521_ANA_GAIN_MAX 0x3f
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#define AR0521_ANA_GAIN_STEP 0x01
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#define AR0521_ANA_GAIN_DEFAULT 0x00
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/* AR0521 registers */
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/* AR0521 registers */
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#define AR0521_REG_VT_PIX_CLK_DIV 0x0300
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#define AR0521_REG_VT_PIX_CLK_DIV 0x0300
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#define AR0521_REG_FRAME_LENGTH_LINES 0x0340
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#define AR0521_REG_FRAME_LENGTH_LINES 0x0340
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@ -50,6 +55,8 @@
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#define AR0521_REG_RESET_RESTART BIT(1)
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#define AR0521_REG_RESET_RESTART BIT(1)
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#define AR0521_REG_RESET_INIT BIT(0)
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#define AR0521_REG_RESET_INIT BIT(0)
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#define AR0521_REG_ANA_GAIN_CODE_GLOBAL 0x3028
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#define AR0521_REG_GREEN1_GAIN 0x3056
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#define AR0521_REG_GREEN1_GAIN 0x3056
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#define AR0521_REG_BLUE_GAIN 0x3058
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#define AR0521_REG_BLUE_GAIN 0x3058
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#define AR0521_REG_RED_GAIN 0x305A
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#define AR0521_REG_RED_GAIN 0x305A
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@ -455,6 +462,10 @@ static int ar0521_s_ctrl(struct v4l2_ctrl *ctrl)
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case V4L2_CID_VBLANK:
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case V4L2_CID_VBLANK:
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ret = ar0521_set_geometry(sensor);
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ret = ar0521_set_geometry(sensor);
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break;
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break;
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case V4L2_CID_ANALOGUE_GAIN:
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ret = ar0521_write_reg(sensor, AR0521_REG_ANA_GAIN_CODE_GLOBAL,
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ctrl->val);
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break;
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case V4L2_CID_GAIN:
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case V4L2_CID_GAIN:
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case V4L2_CID_RED_BALANCE:
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case V4L2_CID_RED_BALANCE:
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case V4L2_CID_BLUE_BALANCE:
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case V4L2_CID_BLUE_BALANCE:
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@ -498,6 +509,11 @@ static int ar0521_init_controls(struct ar0521_dev *sensor)
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/* We can use our own mutex for the ctrl lock */
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/* We can use our own mutex for the ctrl lock */
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hdl->lock = &sensor->lock;
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hdl->lock = &sensor->lock;
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/* Analog gain */
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v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN,
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AR0521_ANA_GAIN_MIN, AR0521_ANA_GAIN_MAX,
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AR0521_ANA_GAIN_STEP, AR0521_ANA_GAIN_DEFAULT);
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/* Manual gain */
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/* Manual gain */
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ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 0, 511, 1, 0);
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ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 0, 511, 1, 0);
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ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
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ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
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