clocksource: sh_cmt: Add CMT register layout comment
Add a comment about different register layouts supported by the CMT driver. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: John Stultz <john.stultz@linaro.org> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -66,6 +66,21 @@ struct sh_cmt_priv {
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unsigned long value);
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unsigned long value);
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};
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};
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/* Examples of supported CMT timer register layouts and I/O access widths:
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*
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* "16-bit counter and 16-bit control" as found on sh7263:
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* CMSTR 0xfffec000 16-bit
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* CMCSR 0xfffec002 16-bit
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* CMCNT 0xfffec004 16-bit
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* CMCOR 0xfffec006 16-bit
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*
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* "32-bit counter and 16-bit control" as found on sh7372, sh73a0, r8a7740:
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* CMSTR 0xffca0000 16-bit
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* CMCSR 0xffca0060 16-bit
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* CMCNT 0xffca0064 32-bit
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* CMCOR 0xffca0068 32-bit
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*/
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static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
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static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
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{
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{
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return ioread16(base + (offs << 1));
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return ioread16(base + (offs << 1));
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