[PATCH] chelsio: whitespace fixes

Fix indentation and blank/tab issues.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Stephen Hemminger 2006-12-01 16:36:13 -08:00 committed by Jeff Garzik
parent 6b4bdde61b
commit 11e5a202ca
4 changed files with 16 additions and 16 deletions

View File

@ -729,7 +729,7 @@ static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
static int get_eeprom_len(struct net_device *dev) static int get_eeprom_len(struct net_device *dev)
{ {
return EEPROM_SIZE; return EEPROM_SIZE;
} }
#define EEPROM_MAGIC(ap) \ #define EEPROM_MAGIC(ap) \

View File

@ -192,7 +192,7 @@ int t1_espi_intr_handler(struct peespi *espi)
const struct espi_intr_counts *t1_espi_get_intr_counts(struct peespi *espi) const struct espi_intr_counts *t1_espi_get_intr_counts(struct peespi *espi)
{ {
return &espi->intr_cnt; return &espi->intr_cnt;
} }
static void espi_setup_for_pm3393(adapter_t *adapter) static void espi_setup_for_pm3393(adapter_t *adapter)

View File

@ -46,17 +46,17 @@
/* 802.3ae 10Gb/s MDIO Manageable Device(MMD) /* 802.3ae 10Gb/s MDIO Manageable Device(MMD)
*/ */
enum { enum {
MMD_RESERVED, MMD_RESERVED,
MMD_PMAPMD, MMD_PMAPMD,
MMD_WIS, MMD_WIS,
MMD_PCS, MMD_PCS,
MMD_PHY_XGXS, /* XGMII Extender Sublayer */ MMD_PHY_XGXS, /* XGMII Extender Sublayer */
MMD_DTE_XGXS, MMD_DTE_XGXS,
}; };
enum { enum {
PHY_XGXS_CTRL_1, PHY_XGXS_CTRL_1,
PHY_XGXS_STATUS_1 PHY_XGXS_STATUS_1
}; };
#define OFFSET(REG_ADDR) (REG_ADDR << 2) #define OFFSET(REG_ADDR) (REG_ADDR << 2)

View File

@ -166,11 +166,11 @@ static int t1_pci_intr_handler(adapter_t *adapter)
{ {
u32 pcix_cause; u32 pcix_cause;
pci_read_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, &pcix_cause); pci_read_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, &pcix_cause);
if (pcix_cause) { if (pcix_cause) {
pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE,
pcix_cause); pcix_cause);
t1_fatal_err(adapter); /* PCI errors are fatal */ t1_fatal_err(adapter); /* PCI errors are fatal */
} }
return 0; return 0;
@ -420,9 +420,9 @@ int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc)
*/ */
int elmer0_ext_intr_handler(adapter_t *adapter) int elmer0_ext_intr_handler(adapter_t *adapter)
{ {
struct cphy *phy; struct cphy *phy;
int phy_cause; int phy_cause;
u32 cause; u32 cause;
t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause); t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause);
@ -515,7 +515,7 @@ void t1_interrupts_clear(adapter_t* adapter)
} }
/* Enable interrupts for external devices. */ /* Enable interrupts for external devices. */
pl_intr = readl(adapter->regs + A_PL_CAUSE); pl_intr = readl(adapter->regs + A_PL_CAUSE);
writel(pl_intr | F_PL_INTR_EXT | F_PL_INTR_PCIX, writel(pl_intr | F_PL_INTR_EXT | F_PL_INTR_PCIX,
adapter->regs + A_PL_CAUSE); adapter->regs + A_PL_CAUSE);
@ -643,7 +643,7 @@ static int board_init(adapter_t *adapter, const struct board_info *bi)
case CHBT_BOARD_N110: case CHBT_BOARD_N110:
case CHBT_BOARD_N210: case CHBT_BOARD_N210:
writel(V_TPIPAR(0xf), adapter->regs + A_TPI_PAR); writel(V_TPIPAR(0xf), adapter->regs + A_TPI_PAR);
t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); t1_tpi_write(adapter, A_ELMER0_GPO, 0x800);
break; break;
} }
return 0; return 0;