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drm/amdgpu: equip new req_init_data handshake

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by this new handshake host side can prepare vbios/ip-discovery
and pf&vf exchange data upon recieving this request without
stopping world switch.

this way the world switch is less impacted by VF's exclusive mode
request

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Monk Liu 2020-03-04 23:51:51 +08:00 committed by Alex Deucher
parent ff1f03a7b8
commit 122078de16
2 changed files with 28 additions and 6 deletions
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19
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
View File

@ -1798,6 +1798,21 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
amdgpu_amdkfd_device_probe(adev); amdgpu_amdkfd_device_probe(adev);
if (amdgpu_sriov_vf(adev)) { if (amdgpu_sriov_vf(adev)) {
/* handle vbios stuff prior full access mode for new handshake */
if (adev->virt.req_init_data_ver == 1) {
if (!amdgpu_get_bios(adev)) {
DRM_ERROR("failed to get vbios\n");
return -EINVAL;
}
r = amdgpu_atombios_init(adev);
if (r) {
dev_err(adev->dev, "amdgpu_atombios_init failed\n");
amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
return r;
}
}
r = amdgpu_virt_request_full_gpu(adev, true); r = amdgpu_virt_request_full_gpu(adev, true);
if (r) if (r)
return -EAGAIN; return -EAGAIN;
@ -1830,6 +1845,10 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
} }
/* get the vbios after the asic_funcs are set up */ /* get the vbios after the asic_funcs are set up */
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) { if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {
/* skip vbios handling for new handshake */
if (amdgpu_sriov_vf(adev) && adev->virt.req_init_data_ver == 1)
continue;
/* Read BIOS */ /* Read BIOS */
if (!amdgpu_get_bios(adev)) if (!amdgpu_get_bios(adev))
return -EINVAL; return -EINVAL;

15
drivers/gpu/drm/amd/amdgpu/nv.c
View File

@ -457,17 +457,20 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
{ {
int r; int r;
adev->nbio.funcs = &nbio_v2_3_funcs;
adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;
if (amdgpu_sriov_vf(adev)) {
adev->virt.ops = &xgpu_nv_virt_ops;
/* try send GPU_INIT_DATA request to host */
amdgpu_virt_request_init_data(adev);
}
/* Set IP register base before any HW register access */ /* Set IP register base before any HW register access */
r = nv_reg_base_init(adev); r = nv_reg_base_init(adev);
if (r) if (r)
return r; return r;
adev->nbio.funcs = &nbio_v2_3_funcs;
adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;
if (amdgpu_sriov_vf(adev))
adev->virt.ops = &xgpu_nv_virt_ops;
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_NAVI10: case CHIP_NAVI10:
case CHIP_NAVI14: case CHIP_NAVI14: