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ASoC: codecs: max*: rename to snd_soc_component_read()

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We need to use snd_soc_component_read()
instead of     snd_soc_component_read32()

This patch renames _read32() to _read()

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87imfr4mdl.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kuninori Morimoto 2020-06-16 14:20:53 +09:00 committed by Mark Brown
parent e348cf5434
commit 1227f601ba
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
4 changed files with 25 additions and 25 deletions
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12
sound/soc/codecs/max98088.c
View File

@ -996,7 +996,7 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
if (snd_soc_component_read32(component, M98088_REG_14_DAI1_FORMAT)
if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT)
& M98088_DAI_MAS) {
if (max98088->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
@ -1063,7 +1063,7 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
if (snd_soc_component_read32(component, M98088_REG_1C_DAI2_FORMAT)
if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT)
& M98088_DAI_MAS) {
if (max98088->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
@ -1120,7 +1120,7 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai,
return -EINVAL;
}
if (snd_soc_component_read32(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) {
if (snd_soc_component_read(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) {
snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS,
M98088_SHDNRUN, 0);
snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS,
@ -1440,7 +1440,7 @@ static void max98088_setup_eq1(struct snd_soc_component *component)
pdata->eq_cfg[best].rate, fs);
/* Disable EQ while configuring, and save current on/off state */
save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL);
save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL);
snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0);
coef_set = &pdata->eq_cfg[sel];
@ -1487,7 +1487,7 @@ static void max98088_setup_eq2(struct snd_soc_component *component)
pdata->eq_cfg[best].rate, fs);
/* Disable EQ while configuring, and save current on/off state */
save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL);
save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL);
snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0);
coef_set = &pdata->eq_cfg[sel];
@ -1673,7 +1673,7 @@ static int max98088_probe(struct snd_soc_component *component)
max98088->mic1pre = 0;
max98088->mic2pre = 0;
ret = snd_soc_component_read32(component, M98088_REG_FF_REV_ID);
ret = snd_soc_component_read(component, M98088_REG_FF_REV_ID);
if (ret < 0) {
dev_err(component->dev, "Failed to read device revision: %d\n",
ret);

20
sound/soc/codecs/max98090.c
View File

@ -353,7 +353,7 @@ static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol,
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
unsigned int mask = (1 << fls(mc->max)) - 1;
unsigned int val = snd_soc_component_read32(component, mc->reg);
unsigned int val = snd_soc_component_read(component, mc->reg);
unsigned int *select;
switch (mc->reg) {
@ -394,7 +394,7 @@ static int max98090_put_enab_tlv(struct snd_kcontrol *kcontrol,
(struct soc_mixer_control *)kcontrol->private_value;
unsigned int mask = (1 << fls(mc->max)) - 1;
unsigned int sel = ucontrol->value.integer.value[0];
unsigned int val = snd_soc_component_read32(component, mc->reg);
unsigned int val = snd_soc_component_read(component, mc->reg);
unsigned int *select;
switch (mc->reg) {
@ -730,7 +730,7 @@ static int max98090_micinput_event(struct snd_soc_dapm_widget *w,
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
unsigned int val = snd_soc_component_read32(component, w->reg);
unsigned int val = snd_soc_component_read(component, w->reg);
if (w->reg == M98090_REG_MIC1_INPUT_LEVEL)
val = (val & M98090_MIC_PA1EN_MASK) >> M98090_MIC_PA1EN_SHIFT;
@ -1496,7 +1496,7 @@ static void max98090_configure_bclk(struct snd_soc_component *component)
}
/* Skip configuration when operating as slave */
if (!(snd_soc_component_read32(component, M98090_REG_MASTER_MODE) &
if (!(snd_soc_component_read(component, M98090_REG_MASTER_MODE) &
M98090_MAS_MASK)) {
return;
}
@ -2132,7 +2132,7 @@ static void max98090_pll_work(struct max98090_priv *max98090)
usleep_range(1000, 1200);
/* Check lock status */
pll = snd_soc_component_read32(
pll = snd_soc_component_read(
component, M98090_REG_DEVICE_STATUS);
if (!(pll & M98090_ULK_MASK))
break;
@ -2157,16 +2157,16 @@ static void max98090_jack_work(struct work_struct *work)
msleep(50);
reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS);
reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS);
/* Weak pull up allows only insertion detection */
snd_soc_component_update_bits(component, M98090_REG_JACK_DETECT,
M98090_JDWK_MASK, M98090_JDWK_MASK);
} else {
reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS);
reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS);
}
reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS);
reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS);
switch (reg & (M98090_LSNS_MASK | M98090_JKSNS_MASK)) {
case M98090_LSNS_MASK | M98090_JKSNS_MASK:
@ -2406,7 +2406,7 @@ static int max98090_probe(struct snd_soc_component *component)
max98090->pa1en = 0;
max98090->pa2en = 0;
ret = snd_soc_component_read32(component, M98090_REG_REVISION_ID);
ret = snd_soc_component_read(component, M98090_REG_REVISION_ID);
if (ret < 0) {
dev_err(component->dev, "Failed to read device revision: %d\n",
ret);
@ -2446,7 +2446,7 @@ static int max98090_probe(struct snd_soc_component *component)
* An old interrupt ocurring prior to installing the ISR
* can keep a new interrupt from generating a trigger.
*/
snd_soc_component_read32(component, M98090_REG_DEVICE_STATUS);
snd_soc_component_read(component, M98090_REG_DEVICE_STATUS);
/* High Performance is default */
snd_soc_component_update_bits(component, M98090_REG_DAC_CONTROL,

16
sound/soc/codecs/max98095.c
View File

@ -971,7 +971,7 @@ static int max98095_dai1_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
if (snd_soc_component_read32(component, M98095_02A_DAI1_FORMAT) & M98095_DAI_MAS) {
if (snd_soc_component_read(component, M98095_02A_DAI1_FORMAT) & M98095_DAI_MAS) {
if (max98095->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
return -EINVAL;
@ -1032,7 +1032,7 @@ static int max98095_dai2_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
if (snd_soc_component_read32(component, M98095_034_DAI2_FORMAT) & M98095_DAI_MAS) {
if (snd_soc_component_read(component, M98095_034_DAI2_FORMAT) & M98095_DAI_MAS) {
if (max98095->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
return -EINVAL;
@ -1093,7 +1093,7 @@ static int max98095_dai3_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
if (snd_soc_component_read32(component, M98095_03E_DAI3_FORMAT) & M98095_DAI_MAS) {
if (snd_soc_component_read(component, M98095_03E_DAI3_FORMAT) & M98095_DAI_MAS) {
if (max98095->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
return -EINVAL;
@ -1534,7 +1534,7 @@ static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol,
regmask = (channel == 0) ? M98095_EQ1EN : M98095_EQ2EN;
/* Disable filter while configuring, and save current on/off state */
regsave = snd_soc_component_read32(component, M98095_088_CFG_LEVEL);
regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
mutex_lock(&max98095->lock);
@ -1685,7 +1685,7 @@ static int max98095_put_bq_enum(struct snd_kcontrol *kcontrol,
regmask = (channel == 0) ? M98095_BQ1EN : M98095_BQ2EN;
/* Disable filter while configuring, and save current on/off state */
regsave = snd_soc_component_read32(component, M98095_088_CFG_LEVEL);
regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
mutex_lock(&max98095->lock);
@ -1816,7 +1816,7 @@ static irqreturn_t max98095_report_jack(int irq, void *data)
int mic_report = 0;
/* Read the Jack Status Register */
value = snd_soc_component_read32(component, M98095_007_JACK_AUTO_STS);
value = snd_soc_component_read(component, M98095_007_JACK_AUTO_STS);
/* If ddone is not set, then detection isn't finished yet */
if ((value & M98095_DDONE) == 0)
@ -1972,7 +1972,7 @@ static int max98095_reset(struct snd_soc_component *component)
/* Reset to hardware default for registers, as there is not
* a soft reset hardware control register */
for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) {
ret = snd_soc_component_write(component, i, snd_soc_component_read32(component, i));
ret = snd_soc_component_write(component, i, snd_soc_component_read(component, i));
if (ret < 0) {
dev_err(component->dev, "Failed to reset: %d\n", ret);
return ret;
@ -2038,7 +2038,7 @@ static int max98095_probe(struct snd_soc_component *component)
}
}
ret = snd_soc_component_read32(component, M98095_0FF_REV_ID);
ret = snd_soc_component_read(component, M98095_0FF_REV_ID);
if (ret < 0) {
dev_err(component->dev, "Failure reading hardware revision: %d\n",
ret);

2
sound/soc/codecs/max9850.c
View File

@ -121,7 +121,7 @@ static int max9850_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
/* lrclk_div = 2^22 * rate / iclk with iclk = mclk / sf */
sf = (snd_soc_component_read32(component, MAX9850_CLOCK) >> 2) + 1;
sf = (snd_soc_component_read(component, MAX9850_CLOCK) >> 2) + 1;
lrclk_div = (1 << 22);
lrclk_div *= params_rate(params);
lrclk_div *= sf;