tty: serial: msm: Add mask value for UART_DM registers

The bit masks for RFR_LEVEL1 and STALE_TIMEOUT_MSB values in MR1 and
IPR registers respectively are different for UART and UART_DM hardware
cores. We have been using UART core mask values for these. Add the same
for UART_DM core.

There is no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do
it only for UART core.

Signed-off-by: Pramod Gurav <gpramod@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Pramod Gurav 2015-09-30 15:26:58 +03:00 committed by Greg Kroah-Hartman
parent 2b0159d1ec
commit 12b9b9f186
2 changed files with 22 additions and 6 deletions

View File

@ -421,7 +421,7 @@ msm_find_best_baud(struct uart_port *port, unsigned int baud)
static int msm_set_baud_rate(struct uart_port *port, unsigned int baud)
{
unsigned int rxstale, watermark;
unsigned int rxstale, watermark, mask;
struct msm_port *msm_port = UART_TO_MSM(port);
const struct msm_baud_map *entry;
@ -432,8 +432,15 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud)
/* RX stale watermark */
rxstale = entry->rxstale;
watermark = UART_IPR_STALE_LSB & rxstale;
watermark |= UART_IPR_RXSTALE_LAST;
watermark |= UART_IPR_STALE_TIMEOUT_MSB & (rxstale << 2);
if (msm_port->is_uartdm) {
mask = UART_DM_IPR_STALE_TIMEOUT_MSB;
} else {
watermark |= UART_IPR_RXSTALE_LAST;
mask = UART_IPR_STALE_TIMEOUT_MSB;
}
watermark |= mask & (rxstale << 2);
msm_write(port, watermark, UART_IPR);
/* set RX watermark */
@ -476,7 +483,7 @@ static void msm_init_clock(struct uart_port *port)
static int msm_startup(struct uart_port *port)
{
struct msm_port *msm_port = UART_TO_MSM(port);
unsigned int data, rfr_level;
unsigned int data, rfr_level, mask;
int ret;
snprintf(msm_port->name, sizeof(msm_port->name),
@ -496,11 +503,18 @@ static int msm_startup(struct uart_port *port)
/* set automatic RFR level */
data = msm_read(port, UART_MR1);
data &= ~UART_MR1_AUTO_RFR_LEVEL1;
if (msm_port->is_uartdm)
mask = UART_DM_MR1_AUTO_RFR_LEVEL1;
else
mask = UART_MR1_AUTO_RFR_LEVEL1;
data &= ~mask;
data &= ~UART_MR1_AUTO_RFR_LEVEL0;
data |= UART_MR1_AUTO_RFR_LEVEL1 & (rfr_level << 2);
data |= mask & (rfr_level << 2);
data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level;
msm_write(port, data, UART_MR1);
return 0;
}

View File

@ -20,6 +20,7 @@
#define UART_MR1_AUTO_RFR_LEVEL0 0x3F
#define UART_MR1_AUTO_RFR_LEVEL1 0x3FF00
#define UART_DM_MR1_AUTO_RFR_LEVEL1 0xFFFFFF00
#define UART_MR1_RX_RDY_CTL (1 << 7)
#define UART_MR1_CTS_CTL (1 << 6)
@ -78,6 +79,7 @@
#define UART_IPR_RXSTALE_LAST 0x20
#define UART_IPR_STALE_LSB 0x1F
#define UART_IPR_STALE_TIMEOUT_MSB 0x3FF80
#define UART_DM_IPR_STALE_TIMEOUT_MSB 0xFFFFFF80
#define UART_IPR 0x0018
#define UART_TFWR 0x001C