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TTY/Serial driver fixes for 6.4-rc5

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Here are some small tty/serial driver fixes for 6.4-rc5 that have all
 been in linux-next this past week with no reported problems.  Included
 in here are:
   - 8250_tegra driver bugfix
   - fsl uart driver bugfixes
   - Kconfig fix for dependancy issue
   - dt-bindings fix for the 8250_omap driver
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-6.4-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver fixes from Greg KH:
 "Here are some small tty/serial driver fixes for 6.4-rc5 that have all
  been in linux-next this past week with no reported problems. Included
  in here are:

   - 8250_tegra driver bugfix

   - fsl uart driver bugfixes

   - Kconfig fix for dependancy issue

   - dt-bindings fix for the 8250_omap driver"

* tag 'tty-6.4-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
  dt-bindings: serial: 8250_omap: add rs485-rts-active-high
  serial: cpm_uart: Fix a COMPILE_TEST dependency
  soc: fsl: cpm1: Fix TSA and QMC dependencies in case of COMPILE_TEST
  tty: serial: fsl_lpuart: use UARTCTRL_TXINV to send break instead of UARTCTRL_SBK
  serial: 8250_tegra: Fix an error handling path in tegra_uart_probe()
This commit is contained in:
Linus Torvalds 2023-06-04 07:51:33 -04:00
commit 12c2f77b32
6 changed files with 30 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/serial/8250_omap.yaml
View File

@ -70,6 +70,7 @@ properties:
dsr-gpios: true
rng-gpios: true
dcd-gpios: true
rs485-rts-active-high: true
rts-gpio: true
power-domains: true
clock-frequency: true

4
drivers/soc/fsl/qe/Kconfig
View File

@ -36,7 +36,7 @@ config UCC
config CPM_TSA
tristate "CPM TSA support"
depends on OF && HAS_IOMEM
depends on CPM1 || COMPILE_TEST
depends on CPM1 || (CPM && COMPILE_TEST)
help
Freescale CPM Time Slot Assigner (TSA)
controller.
@ -47,7 +47,7 @@ config CPM_TSA
config CPM_QMC
tristate "CPM QMC support"
depends on OF && HAS_IOMEM
depends on CPM1 || (FSL_SOC && COMPILE_TEST)
depends on CPM1 || (FSL_SOC && CPM && COMPILE_TEST)
depends on CPM_TSA
help
Freescale CPM QUICC Multichannel Controller

4
drivers/tty/serial/8250/8250_tegra.c
View File

@ -113,13 +113,15 @@ static int tegra_uart_probe(struct platform_device *pdev)
ret = serial8250_register_8250_port(&port8250);
if (ret < 0)
goto err_clkdisable;
goto err_ctrl_assert;
platform_set_drvdata(pdev, uart);
uart->line = ret;
return 0;
err_ctrl_assert:
reset_control_assert(uart->rst);
err_clkdisable:
clk_disable_unprepare(uart->clk);

2
drivers/tty/serial/Kconfig
View File

@ -762,7 +762,7 @@ config SERIAL_PMACZILOG_CONSOLE
config SERIAL_CPM
tristate "CPM SCC/SMC serial port support"
depends on CPM2 || CPM1 || (PPC32 && COMPILE_TEST)
depends on CPM2 || CPM1
select SERIAL_CORE
help
This driver supports the SCC and SMC serial ports on Motorola

2
drivers/tty/serial/cpm_uart/cpm_uart.h
View File

@ -19,8 +19,6 @@ struct gpio_desc;
#include "cpm_uart_cpm2.h"
#elif defined(CONFIG_CPM1)
#include "cpm_uart_cpm1.h"
#elif defined(CONFIG_COMPILE_TEST)
#include "cpm_uart_cpm2.h"
#endif
#define SERIAL_CPM_MAJOR 204

44
drivers/tty/serial/fsl_lpuart.c
View File

@ -1495,34 +1495,36 @@ static void lpuart_break_ctl(struct uart_port *port, int break_state)
static void lpuart32_break_ctl(struct uart_port *port, int break_state)
{
unsigned long temp, modem;
struct tty_struct *tty;
unsigned int cflag = 0;
unsigned long temp;
tty = tty_port_tty_get(&port->state->port);
if (tty) {
cflag = tty->termios.c_cflag;
tty_kref_put(tty);
}
temp = lpuart32_read(port, UARTCTRL) & ~UARTCTRL_SBK;
modem = lpuart32_read(port, UARTMODIR);
temp = lpuart32_read(port, UARTCTRL);
/*
* LPUART IP now has two known bugs, one is CTS has higher priority than the
* break signal, which causes the break signal sending through UARTCTRL_SBK
* may impacted by the CTS input if the HW flow control is enabled. It
* exists on all platforms we support in this driver.
* Another bug is i.MX8QM LPUART may have an additional break character
* being sent after SBK was cleared.
* To avoid above two bugs, we use Transmit Data Inversion function to send
* the break signal instead of UARTCTRL_SBK.
*/
if (break_state != 0) {
temp |= UARTCTRL_SBK;
/*
* LPUART CTS has higher priority than SBK, need to disable CTS before
* asserting SBK to avoid any interference if flow control is enabled.
* Disable the transmitter to prevent any data from being sent out
* during break, then invert the TX line to send break.
*/
if (cflag & CRTSCTS && modem & UARTMODIR_TXCTSE)
lpuart32_write(port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
temp &= ~UARTCTRL_TE;
lpuart32_write(port, temp, UARTCTRL);
temp |= UARTCTRL_TXINV;
lpuart32_write(port, temp, UARTCTRL);
} else {
/* Re-enable the CTS when break off. */
if (cflag & CRTSCTS && !(modem & UARTMODIR_TXCTSE))
lpuart32_write(port, modem | UARTMODIR_TXCTSE, UARTMODIR);
/* Disable the TXINV to turn off break and re-enable transmitter. */
temp &= ~UARTCTRL_TXINV;
lpuart32_write(port, temp, UARTCTRL);
temp |= UARTCTRL_TE;
lpuart32_write(port, temp, UARTCTRL);
}
lpuart32_write(port, temp, UARTCTRL);
}
static void lpuart_setup_watermark(struct lpuart_port *sport)