drm/i915: Simplify the DG1 power well descriptors
Simplify the definition of DG1 power wells by reusing the identical RKL DDI/AUX descriptors. This reorders the DG1 DDI/AUX vs. PW4/5 power wells, but this shouldn't make a difference (it is the order on RKL and the DDI/AUX power wells don't have a dependency on PW4/5). Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-12-imre.deak@intel.com
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@ -1035,7 +1035,11 @@ static const struct i915_power_well_desc rkl_power_wells_main[] = {
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.ops = &hsw_power_well_ops,
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.has_fuses = true,
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.irq_pipe_mask = BIT(PIPE_C),
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}, {
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},
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};
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static const struct i915_power_well_desc rkl_power_wells_ddi_aux[] = {
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{
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.instances = &I915_PW_INSTANCES(
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I915_PW("DDI_IO_A", &icl_pwdoms_ddi_io_a, .hsw.idx = ICL_PW_CTL_IDX_DDI_A),
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I915_PW("DDI_IO_B", &icl_pwdoms_ddi_io_b, .hsw.idx = ICL_PW_CTL_IDX_DDI_B),
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@ -1058,6 +1062,7 @@ static const struct i915_power_well_desc_list rkl_power_wells[] = {
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I915_PW_DESCRIPTORS(i9xx_power_wells_always_on),
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I915_PW_DESCRIPTORS(icl_power_wells_pw_1),
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I915_PW_DESCRIPTORS(rkl_power_wells_main),
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I915_PW_DESCRIPTORS(rkl_power_wells_ddi_aux),
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};
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/*
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@ -1117,22 +1122,6 @@ static const struct i915_power_well_desc dg1_power_wells_main[] = {
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.irq_pipe_mask = BIT(PIPE_B),
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.has_vga = true,
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.has_fuses = true,
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}, {
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.instances = &I915_PW_INSTANCES(
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I915_PW("DDI_IO_A", &icl_pwdoms_ddi_io_a, .hsw.idx = ICL_PW_CTL_IDX_DDI_A),
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I915_PW("DDI_IO_B", &icl_pwdoms_ddi_io_b, .hsw.idx = ICL_PW_CTL_IDX_DDI_B),
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I915_PW("DDI_IO_TC1", &tgl_pwdoms_ddi_io_tc1, .hsw.idx = TGL_PW_CTL_IDX_DDI_TC1),
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I915_PW("DDI_IO_TC2", &tgl_pwdoms_ddi_io_tc2, .hsw.idx = TGL_PW_CTL_IDX_DDI_TC2),
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),
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.ops = &icl_ddi_power_well_ops,
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}, {
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.instances = &I915_PW_INSTANCES(
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I915_PW("AUX_A", &tgl_pwdoms_aux_a, .hsw.idx = ICL_PW_CTL_IDX_AUX_A),
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I915_PW("AUX_B", &tgl_pwdoms_aux_b, .hsw.idx = ICL_PW_CTL_IDX_AUX_B),
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I915_PW("AUX_USBC1", &tgl_pwdoms_aux_usbc1, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC1),
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I915_PW("AUX_USBC2", &tgl_pwdoms_aux_usbc2, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC2),
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),
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.ops = &icl_aux_power_well_ops,
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}, {
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.instances = &I915_PW_INSTANCES(
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I915_PW("PW_4", &tgl_pwdoms_pw_4,
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@ -1156,6 +1145,7 @@ static const struct i915_power_well_desc_list dg1_power_wells[] = {
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I915_PW_DESCRIPTORS(i9xx_power_wells_always_on),
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I915_PW_DESCRIPTORS(icl_power_wells_pw_1),
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I915_PW_DESCRIPTORS(dg1_power_wells_main),
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I915_PW_DESCRIPTORS(rkl_power_wells_ddi_aux),
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};
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/*
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