MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REV
Remove the need to check that __mips_isa_rev is defined by using the newly added MIPS_ISA_REV. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18677/ Signed-off-by: James Hogan <jhogan@kernel.org>
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@ -11,6 +11,7 @@
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*/
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#include <asm/asm.h>
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#include <asm/isa-rev.h>
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#include <asm/regdef.h>
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#include "bpf_jit.h"
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@ -65,7 +66,7 @@ FEXPORT(sk_load_word_positive)
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lw $r_A, 0(t1)
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.set noreorder
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_A
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rotr $r_A, t0, 16
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# else
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@ -92,7 +93,7 @@ FEXPORT(sk_load_half_positive)
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PTR_ADDU t1, $r_skb_data, offset
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lhu $r_A, 0(t1)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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# if MIPS_ISA_REV >= 2
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wsbh $r_A, $r_A
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# else
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sll t0, $r_A, 8
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@ -170,7 +171,7 @@ FEXPORT(sk_load_byte_positive)
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NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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bpf_slow_path_common(4)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_s0
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jr $r_ra
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rotr $r_A, t0, 16
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@ -196,7 +197,7 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
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bpf_slow_path_common(2)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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# if MIPS_ISA_REV >= 2
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jr $r_ra
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wsbh $r_A, $r_s0
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# else
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