ARM: Integrator: convert to generic clockevent support
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -242,6 +242,7 @@ config ARCH_INTEGRATOR
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select COMMON_CLKDEV
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select ICST525
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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help
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Support for ARM's Integrator platform.
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@ -20,6 +20,7 @@
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <asm/clkdev.h>
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@ -275,61 +276,99 @@ static void integrator_clocksource_init(u32 khz)
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clocksource_register(cs);
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}
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static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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integrator_timer_interrupt(int irq, void *dev_id)
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static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
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{
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/*
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* clear the interrupt
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*/
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writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
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struct clock_event_device *evt = dev_id;
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timer_tick();
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/* clear the interrupt */
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writel(1, clkevt_base + TIMER_INTCLR);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction integrator_timer_irq = {
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.name = "Integrator Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = integrator_timer_interrupt,
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static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
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{
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u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
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BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
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if (mode == CLOCK_EVT_MODE_PERIODIC) {
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writel(ctrl, clkevt_base + TIMER_CTRL);
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writel(timer_reload, clkevt_base + TIMER_LOAD);
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ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
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}
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writel(ctrl, clkevt_base + TIMER_CTRL);
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}
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static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
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{
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unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
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writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
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writel(next, clkevt_base + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static struct clock_event_device integrator_clockevent = {
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.name = "timer1",
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.shift = 34,
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.set_mode = clkevt_set_mode,
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.set_next_event = clkevt_set_next_event,
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.rating = 300,
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.cpumask = cpu_all_mask,
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};
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static struct irqaction integrator_timer_irq = {
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.name = "timer",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = integrator_timer_interrupt,
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.dev_id = &integrator_clockevent,
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};
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static void integrator_clockevent_init(u32 khz, unsigned int ctrl)
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{
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struct clock_event_device *evt = &integrator_clockevent;
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if (khz * 1000 > 0x100000 * HZ) {
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khz /= 256;
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ctrl |= TIMER_CTRL_DIV256;
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} else if (khz * 1000 > 0x10000 * HZ) {
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khz /= 16;
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ctrl |= TIMER_CTRL_DIV16;
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}
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timer_reload = khz * 1000 / HZ;
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writel(ctrl, clkevt_base + TIMER_CTRL);
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evt->irq = IRQ_TIMERINT1;
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evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
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evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
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evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
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setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
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clockevents_register_device(evt);
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}
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/*
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* Set up timer interrupt, and return the current time in seconds.
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* Set up timer(s).
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*/
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void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
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{
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unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
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integrator_clocksource_init(reload * HZ / 1000);
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timer_reload = reload;
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timer_ctrl |= ctrl;
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if (timer_reload > 0x100000) {
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timer_reload >>= 8;
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timer_ctrl |= TIMER_CTRL_DIV256;
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} else if (timer_reload > 0x010000) {
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timer_reload >>= 4;
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timer_ctrl |= TIMER_CTRL_DIV16;
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}
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/*
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* Initialise to a known state (all timers off)
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*/
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writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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writel(0, TIMER1_VA_BASE + TIMER_CTRL);
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writel(0, TIMER2_VA_BASE + TIMER_CTRL);
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writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD);
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writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE);
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writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL);
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/*
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* Make irqs happen for the system timer
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*/
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setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
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integrator_clocksource_init(reload * HZ / 1000);
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integrator_clockevent_init(reload * HZ / 1000, ctrl);
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}
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