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drm/amd/display: update blank state on ODM changes

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When we are dynamically adding new ODM slices, we didn't update
blank state, if the pipe used by new ODM slice is previously blanked,
we will continue outputting blank pixel data on that slice causing
right half of the screen showing blank image.

The previous fix was a temporary hack to directly update current state
when committing new state. This could potentially cause hw and sw
state synchronization issues and it is not permitted by dc commit
design.

Cc: stable@vger.kernel.org
Fixes: 7fbf451e7639 ("drm/amd/display: Reinit DPG when exiting dynamic ODM")
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wenjing Liu 2023-08-14 17:11:16 -04:00 committed by Alex Deucher
parent 72105dcfa3
commit 1482650bc7
1 changed files with 9 additions and 27 deletions
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36
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
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@ -1106,29 +1106,6 @@ void dcn20_blank_pixel_data(
v_active,
offset);
if (!blank && dc->debug.enable_single_display_2to1_odm_policy) {
/* when exiting dynamic ODM need to reinit DPG state for unused pipes */
struct pipe_ctx *old_odm_pipe = dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx].next_odm_pipe;
odm_pipe = pipe_ctx->next_odm_pipe;
while (old_odm_pipe) {
if (!odm_pipe || old_odm_pipe->pipe_idx != odm_pipe->pipe_idx)
dc->hwss.set_disp_pattern_generator(dc,
old_odm_pipe,
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
CONTROLLER_DP_COLOR_SPACE_UDEFINED,
COLOR_DEPTH_888,
NULL,
0,
0,
0);
old_odm_pipe = old_odm_pipe->next_odm_pipe;
if (odm_pipe)
odm_pipe = odm_pipe->next_odm_pipe;
}
}
if (!blank)
if (stream_res->abm) {
dc->hwss.set_pipe(pipe_ctx);
@ -1722,11 +1699,16 @@ static void dcn20_program_pipe(
struct dc_state *context)
{
struct dce_hwseq *hws = dc->hwseq;
/* Only need to unblank on top pipe */
if ((pipe_ctx->update_flags.bits.enable || pipe_ctx->stream->update_flags.bits.abm_level)
&& !pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe)
hws->funcs.blank_pixel_data(dc, pipe_ctx, !pipe_ctx->plane_state->visible);
/* Only need to unblank on top pipe */
if (resource_is_pipe_type(pipe_ctx, OTG_MASTER)) {
if (pipe_ctx->update_flags.bits.enable ||
pipe_ctx->update_flags.bits.odm ||
pipe_ctx->stream->update_flags.bits.abm_level)
hws->funcs.blank_pixel_data(dc, pipe_ctx,
!pipe_ctx->plane_state ||
!pipe_ctx->plane_state->visible);
}
/* Only update TG on top pipe */
if (pipe_ctx->update_flags.bits.global_sync && !pipe_ctx->top_pipe