watchdog: remove dead iop watchdog timer driver
Commit 59d3ae9a5bf6 ("ARM: remove Intel iop33x and iop13xx support")
removes the config ARCH_IOP13XX in ./arch/arm/Kconfig.
Hence, since then, the corresponding iop watchdog timer driver is dead
code. Remove this dead driver.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Lukas Bulwahn
Wim Van Sebroeck
parent
cd004d8299
commit
14b2d18e81
@ -561,22 +561,6 @@ config PNX4008_WATCHDOG
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Say N if you are unsure.
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config IOP_WATCHDOG
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tristate "IOP Watchdog"
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depends on ARCH_IOP13XX
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select WATCHDOG_NOWAYOUT if (ARCH_IOP32X || ARCH_IOP33X)
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help
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Say Y here if to include support for the watchdog timer
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in the Intel IOP3XX & IOP13XX I/O Processors. This driver can
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be built as a module by choosing M. The module will
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be called iop_wdt.
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Note: The IOP13XX watchdog does an Internal Bus Reset which will
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affect both cores and the peripherals of the IOP. The ATU-X
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and/or ATUe configuration registers will remain intact, but if
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operating as an Root Complex and/or Central Resource, the PCI-X
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and/or PCIe busses will also be reset. THIS IS A VERY BIG HAMMER.
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config DAVINCI_WATCHDOG
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tristate "DaVinci watchdog"
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depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
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@ -56,7 +56,6 @@ obj-$(CONFIG_SAMA5D4_WATCHDOG) += sama5d4_wdt.o
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obj-$(CONFIG_DW_WATCHDOG) += dw_wdt.o
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obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
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obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
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obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
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obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
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obj-$(CONFIG_K3_RTI_WATCHDOG) += rti_wdt.o
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obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
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@ -1,250 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/char/watchdog/iop_wdt.c
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*
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* WDT driver for Intel I/O Processors
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* Copyright (C) 2005, Intel Corporation.
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*
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* Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* Curt E Bruns <curt.e.bruns@intel.com>
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* Peter Milne <peter.milne@d-tacq.com>
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* Dan Williams <dan.j.williams@intel.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/uaccess.h>
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#include <mach/hardware.h>
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static unsigned long wdt_status;
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static unsigned long boot_status;
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static DEFINE_SPINLOCK(wdt_lock);
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#define WDT_IN_USE 0
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#define WDT_OK_TO_CLOSE 1
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#define WDT_ENABLED 2
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static unsigned long iop_watchdog_timeout(void)
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{
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return (0xffffffffUL / get_iop_tick_rate());
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}
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/**
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* wdt_supports_disable - determine if we are accessing a iop13xx watchdog
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* or iop3xx by whether it has a disable command
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*/
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static int wdt_supports_disable(void)
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{
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int can_disable;
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if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
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can_disable = 1;
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else
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can_disable = 0;
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return can_disable;
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}
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static void wdt_enable(void)
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{
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/* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
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* Takes approx. 10.7s to timeout
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*/
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spin_lock(&wdt_lock);
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write_wdtcr(IOP_WDTCR_EN_ARM);
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write_wdtcr(IOP_WDTCR_EN);
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spin_unlock(&wdt_lock);
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}
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/* returns 0 if the timer was successfully disabled */
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static int wdt_disable(void)
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{
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/* Stop Counting */
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if (wdt_supports_disable()) {
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spin_lock(&wdt_lock);
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write_wdtcr(IOP_WDTCR_DIS_ARM);
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write_wdtcr(IOP_WDTCR_DIS);
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clear_bit(WDT_ENABLED, &wdt_status);
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spin_unlock(&wdt_lock);
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pr_info("Disabled\n");
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return 0;
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} else
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return 1;
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}
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static int iop_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(WDT_IN_USE, &wdt_status))
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return -EBUSY;
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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wdt_enable();
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set_bit(WDT_ENABLED, &wdt_status);
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return stream_open(inode, file);
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}
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static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len,
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loff_t *ppos)
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{
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if (len) {
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if (!nowayout) {
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size_t i;
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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set_bit(WDT_OK_TO_CLOSE, &wdt_status);
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}
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}
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wdt_enable();
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}
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return len;
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}
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static const struct watchdog_info ident = {
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.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.identity = "iop watchdog",
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};
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static long iop_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int options;
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int ret = -ENOTTY;
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int __user *argp = (int __user *)arg;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user(argp, &ident, sizeof(ident)))
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ret = -EFAULT;
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else
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ret = 0;
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break;
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case WDIOC_GETSTATUS:
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ret = put_user(0, argp);
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break;
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case WDIOC_GETBOOTSTATUS:
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ret = put_user(boot_status, argp);
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break;
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case WDIOC_SETOPTIONS:
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if (get_user(options, (int *)arg))
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return -EFAULT;
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if (options & WDIOS_DISABLECARD) {
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if (!nowayout) {
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if (wdt_disable() == 0) {
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set_bit(WDT_OK_TO_CLOSE, &wdt_status);
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ret = 0;
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} else
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ret = -ENXIO;
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} else
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ret = 0;
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}
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if (options & WDIOS_ENABLECARD) {
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wdt_enable();
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ret = 0;
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}
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break;
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case WDIOC_KEEPALIVE:
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wdt_enable();
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ret = 0;
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break;
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case WDIOC_GETTIMEOUT:
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ret = put_user(iop_watchdog_timeout(), argp);
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break;
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}
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return ret;
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}
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static int iop_wdt_release(struct inode *inode, struct file *file)
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{
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int state = 1;
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if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
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if (test_bit(WDT_ENABLED, &wdt_status))
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state = wdt_disable();
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/* if the timer is not disabled reload and notify that we are still
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* going down
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*/
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if (state != 0) {
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wdt_enable();
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pr_crit("Device closed unexpectedly - reset in %lu seconds\n",
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iop_watchdog_timeout());
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}
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clear_bit(WDT_IN_USE, &wdt_status);
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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return 0;
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}
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static const struct file_operations iop_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = iop_wdt_write,
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.unlocked_ioctl = iop_wdt_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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.open = iop_wdt_open,
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.release = iop_wdt_release,
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};
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static struct miscdevice iop_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &iop_wdt_fops,
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};
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static int __init iop_wdt_init(void)
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{
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int ret;
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/* check if the reset was caused by the watchdog timer */
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boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
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/* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
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* NOTE: An IB Reset will Reset both cores in the IOP342
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*/
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write_wdtsr(IOP13XX_WDTCR_IB_RESET);
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/* Register after we have the device set up so we cannot race
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with an open */
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ret = misc_register(&iop_wdt_miscdev);
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if (ret == 0)
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pr_info("timeout %lu sec\n", iop_watchdog_timeout());
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return ret;
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}
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static void __exit iop_wdt_exit(void)
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{
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misc_deregister(&iop_wdt_miscdev);
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}
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module_init(iop_wdt_init);
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module_exit(iop_wdt_exit);
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
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MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
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MODULE_DESCRIPTION("iop watchdog timer driver");
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MODULE_LICENSE("GPL");
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