net: lantiq: configure the burst length in ethernet drivers
Configure the burst length in Ethernet drivers. This improves Ethernet performance by 58%. According to the vendor BSP, 8W burst length is supported by ar9 and newer SoCs. The NAT benchmark results on xRX200 (Down/Up): * 2W: 330 Mb/s * 4W: 432 Mb/s 372 Mb/s * 8W: 520 Mb/s 389 Mb/s Tested on xRX200 and xRX330. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -96,6 +96,9 @@ struct ltq_etop_priv {
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struct ltq_etop_chan ch[MAX_DMA_CHAN];
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int tx_free[MAX_DMA_CHAN >> 1];
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int tx_burst_len;
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int rx_burst_len;
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spinlock_t lock;
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};
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@ -259,7 +262,7 @@ ltq_etop_hw_init(struct net_device *dev)
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/* enable crc generation */
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ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG);
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ltq_dma_init_port(DMA_PORT_ETOP);
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ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
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for (i = 0; i < MAX_DMA_CHAN; i++) {
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int irq = LTQ_DMA_CH0_INT + i;
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@ -472,8 +475,8 @@ ltq_etop_tx(struct sk_buff *skb, struct net_device *dev)
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return NETDEV_TX_BUSY;
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}
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/* dma needs to start on a 16 byte aligned address */
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byte_offset = CPHYSADDR(skb->data) % 16;
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/* dma needs to start on a burst length value aligned address */
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byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
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ch->skb[ch->dma.desc] = skb;
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netif_trans_update(dev);
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@ -667,6 +670,18 @@ ltq_etop_probe(struct platform_device *pdev)
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spin_lock_init(&priv->lock);
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SET_NETDEV_DEV(dev, &pdev->dev);
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err = device_property_read_u32(&pdev->dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
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if (err < 0) {
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dev_err(&pdev->dev, "unable to read tx-burst-length property\n");
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return err;
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}
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err = device_property_read_u32(&pdev->dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
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if (err < 0) {
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dev_err(&pdev->dev, "unable to read rx-burst-length property\n");
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return err;
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}
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for (i = 0; i < MAX_DMA_CHAN; i++) {
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if (IS_TX(i))
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netif_napi_add(dev, &priv->ch[i].napi,
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@ -71,6 +71,9 @@ struct xrx200_priv {
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struct net_device *net_dev;
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struct device *dev;
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int tx_burst_len;
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int rx_burst_len;
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__iomem void *pmac_reg;
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};
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@ -316,8 +319,8 @@ static netdev_tx_t xrx200_start_xmit(struct sk_buff *skb,
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if (unlikely(dma_mapping_error(priv->dev, mapping)))
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goto err_drop;
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/* dma needs to start on a 16 byte aligned address */
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byte_offset = mapping % 16;
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/* dma needs to start on a burst length value aligned address */
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byte_offset = mapping % (priv->tx_burst_len * 4);
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desc->addr = mapping - byte_offset;
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/* Make sure the address is written before we give it to HW */
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@ -369,7 +372,7 @@ static int xrx200_dma_init(struct xrx200_priv *priv)
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int ret = 0;
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int i;
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ltq_dma_init_port(DMA_PORT_ETOP);
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ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
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ch_rx->dma.nr = XRX200_DMA_RX;
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ch_rx->dma.dev = priv->dev;
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@ -478,6 +481,18 @@ static int xrx200_probe(struct platform_device *pdev)
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if (err)
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eth_hw_addr_random(net_dev);
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err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
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if (err < 0) {
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dev_err(dev, "unable to read tx-burst-length property\n");
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return err;
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}
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err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
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if (err < 0) {
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dev_err(dev, "unable to read rx-burst-length property\n");
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return err;
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}
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/* bring up the dma engine and IP core */
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err = xrx200_dma_init(priv);
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if (err)
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