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riscv: dts: microchip: mpfs: remove bogus card-detect-delay

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commit 2b55915d27dcaa35f54bad7925af0a76001079bc upstream.

Recent versions of dt-schema warn about a previously undetected
undocumented property:
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: mmc@20008000: Unevaluated properties are not allowed ('card-detect-delay' was unexpected)
        From schema: Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml

There are no GPIOs connected to MSSIO6B4 pin K3 so adding the common
cd-debounce-delay-ms property makes no sense. The Cadence IP has a
register that sets the card detect delay as "DP * tclk". On MPFS, this
clock frequency is not configurable (it must be 200 MHz) & the FPGA
comes out of reset with this register already set.

Fixes: bc47b2217f24 ("riscv: dts: microchip: add the sundance polarberry")
Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Conor Dooley 2022-08-20 00:14:15 +01:00 committed by Greg Kroah-Hartman
parent a8604d23a8
commit 14f158b977
2 changed files with 0 additions and 2 deletions
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1
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
View File

@ -100,7 +100,6 @@
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
card-detect-delay = <200>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;

1
arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
View File

@ -70,7 +70,6 @@
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
card-detect-delay = <200>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
sd-uhs-sdr12;