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OMAPDSS: fix AM43xx minimum pixel clock divider

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AM43xx supports pixel clock divider of 1, just like all OMAP3+ SoCs. Fix
the minimum divider value.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Tomi Valkeinen 2014-09-25 17:56:43 +00:00
parent c517d838eb
commit 1511c75be0
1 changed files with 1 additions and 1 deletions
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2
drivers/video/fbdev/omap2/dss/dss_features.c
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@ -440,7 +440,7 @@ static const struct dss_param_range omap3_dss_param_range[] = {
static const struct dss_param_range am43xx_dss_param_range[] = {
[FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
[FEAT_PARAM_DSS_PCD] = { 2, 255 },
[FEAT_PARAM_DSS_PCD] = { 1, 255 },
[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
[FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
};