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drm/omap: tweak HDMI DDC timings

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A "HDMI I2C Master Error" is sometimes reported with the current DDC SCL
timings. The current settings for a 10us SCL period (100 KHz) causes the
error with some displays.  This patch increases the SCL signal period
from 10us to 10.2us, with the new settings the error is not observed

Signed-off-by: Alejandro Hernandez <ajhernandez@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190930103840.18970-4-tomi.valkeinen@ti.com
This commit is contained in:
Alejandro Hernandez 2019-09-30 13:38:36 +03:00 committed by Tomi Valkeinen
parent 6e366c28e6
commit 157d8f6036
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
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@ -39,8 +39,8 @@ static void hdmi_core_ddc_init(struct hdmi_core_data *core)
{
void __iomem *base = core->base;
const unsigned long long iclk = 266000000; /* DSS L3 ICLK */
const unsigned int ss_scl_high = 4600; /* ns */
const unsigned int ss_scl_low = 5400; /* ns */
const unsigned int ss_scl_high = 4700; /* ns */
const unsigned int ss_scl_low = 5500; /* ns */
const unsigned int fs_scl_high = 600; /* ns */
const unsigned int fs_scl_low = 1300; /* ns */
const unsigned int sda_hold = 1000; /* ns */