drm/ingenic: Compute timings according to adjusted_mode->crtc_*
The adjusted_mode->crtc_* fields contain the values adjusted for the hardware, and are the ones that should be written to the registers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20201119155559.14112-2-paul@crapouillou.net
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@ -191,15 +191,15 @@ static void ingenic_drm_crtc_update_timings(struct ingenic_drm *priv,
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{
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unsigned int vpe, vds, vde, vt, hpe, hds, hde, ht;
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vpe = mode->vsync_end - mode->vsync_start;
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vds = mode->vtotal - mode->vsync_start;
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vde = vds + mode->vdisplay;
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vt = vde + mode->vsync_start - mode->vdisplay;
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vpe = mode->crtc_vsync_end - mode->crtc_vsync_start;
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vds = mode->crtc_vtotal - mode->crtc_vsync_start;
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vde = vds + mode->crtc_vdisplay;
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vt = vde + mode->crtc_vsync_start - mode->crtc_vdisplay;
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hpe = mode->hsync_end - mode->hsync_start;
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hds = mode->htotal - mode->hsync_start;
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hde = hds + mode->hdisplay;
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ht = hde + mode->hsync_start - mode->hdisplay;
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hpe = mode->crtc_hsync_end - mode->crtc_hsync_start;
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hds = mode->crtc_htotal - mode->crtc_hsync_start;
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hde = hds + mode->crtc_hdisplay;
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ht = hde + mode->crtc_hsync_start - mode->crtc_hdisplay;
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regmap_write(priv->map, JZ_REG_LCD_VSYNC,
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0 << JZ_LCD_VSYNC_VPS_OFFSET |
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@ -334,7 +334,7 @@ static void ingenic_drm_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_pending_vblank_event *event = crtc_state->event;
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if (drm_atomic_crtc_needs_modeset(crtc_state)) {
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ingenic_drm_crtc_update_timings(priv, &crtc_state->mode);
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ingenic_drm_crtc_update_timings(priv, &crtc_state->adjusted_mode);
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priv->update_clk_rate = true;
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}
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