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Staging / IIO driver fixes for 5.3-rc4

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Here are some small staging and IIO driver fixes for 5.3-rc4.
 
 Nothing major, just resolutions for a number of small reported issues,
 full details in the shortlog.
 
 All have been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'staging-5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging / IIO driver fixes from Greg KH:
 "Here are some small staging and IIO driver fixes for 5.3-rc4.

  Nothing major, just resolutions for a number of small reported issues,
  full details in the shortlog.

  All have been in linux-next for a while with no reported issues"

* tag 'staging-5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
  iio: adc: gyroadc: fix uninitialized return code
  docs: generic-counter.rst: fix broken references for ABI file
  staging: android: ion: Bail out upon SIGKILL when allocating memory.
  Staging: fbtft: Fix GPIO handling
  staging: unisys: visornic: Update the description of 'poll_for_irq()'
  staging: wilc1000: flush the workqueue before deinit the host
  staging: gasket: apex: fix copy-paste typo
  Staging: fbtft: Fix reset assertion when using gpio descriptor
  Staging: fbtft: Fix probing of gpio descriptor
  iio: imu: mpu6050: add missing available scan masks
  iio: cros_ec_accel_legacy: Fix incorrect channel setting
  IIO: Ingenic JZ47xx: Set clock divider on probe
  iio: adc: max9611: Fix misuse of GENMASK macro
This commit is contained in:
Linus Torvalds 2019-08-10 12:13:39 -07:00
commit 15fa98e40e
18 changed files with 138 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/iio/accel/cros_ec_accel_legacy.c
View File

@ -319,7 +319,6 @@ static const struct iio_chan_spec_ext_info cros_ec_accel_legacy_ext_info[] = {
.modified = 1, \
.info_mask_separate = \
BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
.ext_info = cros_ec_accel_legacy_ext_info, \

54
drivers/iio/adc/ingenic-adc.c
View File

@ -11,6 +11,7 @@
#include <linux/iio/iio.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
@ -22,8 +23,11 @@
#define JZ_ADC_REG_ADTCH 0x18
#define JZ_ADC_REG_ADBDAT 0x1c
#define JZ_ADC_REG_ADSDAT 0x20
#define JZ_ADC_REG_ADCLK 0x28
#define JZ_ADC_REG_CFG_BAT_MD BIT(4)
#define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0
#define JZ_ADC_REG_ADCLK_CLKDIV10US_LSB 16
#define JZ_ADC_AUX_VREF 3300
#define JZ_ADC_AUX_VREF_BITS 12
@ -34,6 +38,8 @@
#define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986)
#define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12
struct ingenic_adc;
struct ingenic_adc_soc_data {
unsigned int battery_high_vref;
unsigned int battery_high_vref_bits;
@ -41,6 +47,7 @@ struct ingenic_adc_soc_data {
size_t battery_raw_avail_size;
const int *battery_scale_avail;
size_t battery_scale_avail_size;
int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
};
struct ingenic_adc {
@ -151,6 +158,42 @@ static const int jz4740_adc_battery_scale_avail[] = {
JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS,
};
static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
{
struct clk *parent_clk;
unsigned long parent_rate, rate;
unsigned int div_main, div_10us;
parent_clk = clk_get_parent(adc->clk);
if (!parent_clk) {
dev_err(dev, "ADC clock has no parent\n");
return -ENODEV;
}
parent_rate = clk_get_rate(parent_clk);
/*
* The JZ4725B ADC works at 500 kHz to 8 MHz.
* We pick the highest rate possible.
* In practice we typically get 6 MHz, half of the 12 MHz EXT clock.
*/
div_main = DIV_ROUND_UP(parent_rate, 8000000);
div_main = clamp(div_main, 1u, 64u);
rate = parent_rate / div_main;
if (rate < 500000 || rate > 8000000) {
dev_err(dev, "No valid divider for ADC main clock\n");
return -EINVAL;
}
/* We also need a divider that produces a 10us clock. */
div_10us = DIV_ROUND_UP(rate, 100000);
writel(((div_10us - 1) << JZ_ADC_REG_ADCLK_CLKDIV10US_LSB) |
(div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB,
adc->base + JZ_ADC_REG_ADCLK);
return 0;
}
static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
.battery_high_vref = JZ4725B_ADC_BATTERY_HIGH_VREF,
.battery_high_vref_bits = JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,
@ -158,6 +201,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
.battery_raw_avail_size = ARRAY_SIZE(jz4725b_adc_battery_raw_avail),
.battery_scale_avail = jz4725b_adc_battery_scale_avail,
.battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail),
.init_clk_div = jz4725b_adc_init_clk_div,
};
static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {
@ -167,6 +211,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {
.battery_raw_avail_size = ARRAY_SIZE(jz4740_adc_battery_raw_avail),
.battery_scale_avail = jz4740_adc_battery_scale_avail,
.battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail),
.init_clk_div = NULL, /* no ADCLK register on JZ4740 */
};
static int ingenic_adc_read_avail(struct iio_dev *iio_dev,
@ -317,6 +362,15 @@ static int ingenic_adc_probe(struct platform_device *pdev)
return ret;
}
/* Set clock dividers. */
if (soc_data->init_clk_div) {
ret = soc_data->init_clk_div(dev, adc);
if (ret) {
clk_disable_unprepare(adc->clk);
return ret;
}
}
/* Put hardware in a known passive state. */
writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
writeb(0xff, adc->base + JZ_ADC_REG_CTRL);

2
drivers/iio/adc/max9611.c
View File

@ -83,7 +83,7 @@
#define MAX9611_TEMP_MAX_POS 0x7f80
#define MAX9611_TEMP_MAX_NEG 0xff80
#define MAX9611_TEMP_MIN_NEG 0xd980
#define MAX9611_TEMP_MASK GENMASK(7, 15)
#define MAX9611_TEMP_MASK GENMASK(15, 7)
#define MAX9611_TEMP_SHIFT 0x07
#define MAX9611_TEMP_RAW(_r) ((_r) >> MAX9611_TEMP_SHIFT)
#define MAX9611_TEMP_SCALE_NUM 1000000

4
drivers/iio/adc/rcar-gyroadc.c
View File

@ -382,7 +382,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
dev_err(dev,
"Only %i channels supported with %pOFn, but reg = <%i>.\n",
num_channels, child, reg);
return ret;
return -EINVAL;
}
}
@ -391,7 +391,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
dev_err(dev,
"Channel %i uses different ADC mode than the rest.\n",
reg);
return ret;
return -EINVAL;
}
/* Channel is valid, grab the regulator. */

43
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
View File

@ -845,6 +845,25 @@ static const struct iio_chan_spec inv_mpu_channels[] = {
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
};
static const unsigned long inv_mpu_scan_masks[] = {
/* 3-axis accel */
BIT(INV_MPU6050_SCAN_ACCL_X)
| BIT(INV_MPU6050_SCAN_ACCL_Y)
| BIT(INV_MPU6050_SCAN_ACCL_Z),
/* 3-axis gyro */
BIT(INV_MPU6050_SCAN_GYRO_X)
| BIT(INV_MPU6050_SCAN_GYRO_Y)
| BIT(INV_MPU6050_SCAN_GYRO_Z),
/* 6-axis accel + gyro */
BIT(INV_MPU6050_SCAN_ACCL_X)
| BIT(INV_MPU6050_SCAN_ACCL_Y)
| BIT(INV_MPU6050_SCAN_ACCL_Z)
| BIT(INV_MPU6050_SCAN_GYRO_X)
| BIT(INV_MPU6050_SCAN_GYRO_Y)
| BIT(INV_MPU6050_SCAN_GYRO_Z),
0,
};
static const struct iio_chan_spec inv_icm20602_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
{
@ -871,6 +890,28 @@ static const struct iio_chan_spec inv_icm20602_channels[] = {
INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
};
static const unsigned long inv_icm20602_scan_masks[] = {
/* 3-axis accel + temp (mandatory) */
BIT(INV_ICM20602_SCAN_ACCL_X)
| BIT(INV_ICM20602_SCAN_ACCL_Y)
| BIT(INV_ICM20602_SCAN_ACCL_Z)
| BIT(INV_ICM20602_SCAN_TEMP),
/* 3-axis gyro + temp (mandatory) */
BIT(INV_ICM20602_SCAN_GYRO_X)
| BIT(INV_ICM20602_SCAN_GYRO_Y)
| BIT(INV_ICM20602_SCAN_GYRO_Z)
| BIT(INV_ICM20602_SCAN_TEMP),
/* 6-axis accel + gyro + temp (mandatory) */
BIT(INV_ICM20602_SCAN_ACCL_X)
| BIT(INV_ICM20602_SCAN_ACCL_Y)
| BIT(INV_ICM20602_SCAN_ACCL_Z)
| BIT(INV_ICM20602_SCAN_GYRO_X)
| BIT(INV_ICM20602_SCAN_GYRO_Y)
| BIT(INV_ICM20602_SCAN_GYRO_Z)
| BIT(INV_ICM20602_SCAN_TEMP),
0,
};
/*
* The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
* INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
@ -1130,9 +1171,11 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
if (chip_type == INV_ICM20602) {
indio_dev->channels = inv_icm20602_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
indio_dev->available_scan_masks = inv_icm20602_scan_masks;
} else {
indio_dev->channels = inv_mpu_channels;
indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
indio_dev->available_scan_masks = inv_mpu_scan_masks;
}
indio_dev->info = &mpu_info;

3
drivers/staging/android/ion/ion_page_pool.c
View File

@ -8,11 +8,14 @@
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/swap.h>
#include <linux/sched/signal.h>
#include "ion.h"
static inline struct page *ion_page_pool_alloc_pages(struct ion_page_pool *pool)
{
if (fatal_signal_pending(current))
return NULL;
return alloc_pages(pool->gfp_mask, pool->order);
}

2
drivers/staging/fbtft/fb_bd663474.c
View File

@ -24,7 +24,7 @@
static int init_display(struct fbtft_par *par)
{
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
par->fbtftops.reset(par);

2
drivers/staging/fbtft/fb_ili9163.c
View File

@ -77,7 +77,7 @@ static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
write_reg(par, MIPI_DCS_SOFT_RESET); /* software reset */

2
drivers/staging/fbtft/fb_ili9325.c
View File

@ -85,7 +85,7 @@ static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
bt &= 0x07;

2
drivers/staging/fbtft/fb_s6d1121.c
View File

@ -29,7 +29,7 @@ static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
/* Initialization sequence from Lib_UTFT */

2
drivers/staging/fbtft/fb_ssd1289.c
View File

@ -28,7 +28,7 @@ static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
write_reg(par, 0x00, 0x0001);

4
drivers/staging/fbtft/fb_ssd1331.c
View File

@ -81,7 +81,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...)
va_start(args, len);
*buf = (u8)va_arg(args, unsigned int);
if (!par->gpio.dc)
if (par->gpio.dc)
gpiod_set_value(par->gpio.dc, 0);
ret = par->fbtftops.write(par, par->buf, sizeof(u8));
if (ret < 0) {
@ -104,7 +104,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...)
return;
}
}
if (!par->gpio.dc)
if (par->gpio.dc)
gpiod_set_value(par->gpio.dc, 1);
va_end(args);
}

2
drivers/staging/fbtft/fb_upd161704.c
View File

@ -26,7 +26,7 @@ static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
/* Initialization sequence from Lib_UTFT */

2
drivers/staging/fbtft/fbtft-bus.c
View File

@ -135,7 +135,7 @@ int fbtft_write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len)
remain = len / 2;
vmem16 = (u16 *)(par->info->screen_buffer + offset);
if (!par->gpio.dc)
if (par->gpio.dc)
gpiod_set_value(par->gpio.dc, 1);
/* non buffered write */

47
drivers/staging/fbtft/fbtft-core.c
View File

@ -76,21 +76,18 @@ static int fbtft_request_one_gpio(struct fbtft_par *par,
struct gpio_desc **gpiop)
{
struct device *dev = par->info->device;
struct device_node *node = dev->of_node;
int ret = 0;
if (of_find_property(node, name, NULL)) {
*gpiop = devm_gpiod_get_index(dev, dev->driver->name, index,
GPIOD_OUT_HIGH);
if (IS_ERR(*gpiop)) {
ret = PTR_ERR(*gpiop);
dev_err(dev,
"Failed to request %s GPIO:%d\n", name, ret);
return ret;
}
fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n",
__func__, name);
*gpiop = devm_gpiod_get_index_optional(dev, name, index,
GPIOD_OUT_HIGH);
if (IS_ERR(*gpiop)) {
ret = PTR_ERR(*gpiop);
dev_err(dev,
"Failed to request %s GPIO: %d\n", name, ret);
return ret;
}
fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n",
__func__, name);
return ret;
}
@ -103,34 +100,34 @@ static int fbtft_request_gpios_dt(struct fbtft_par *par)
if (!par->info->device->of_node)
return -EINVAL;
ret = fbtft_request_one_gpio(par, "reset-gpios", 0, &par->gpio.reset);
ret = fbtft_request_one_gpio(par, "reset", 0, &par->gpio.reset);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "dc-gpios", 0, &par->gpio.dc);
ret = fbtft_request_one_gpio(par, "dc", 0, &par->gpio.dc);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "rd-gpios", 0, &par->gpio.rd);
ret = fbtft_request_one_gpio(par, "rd", 0, &par->gpio.rd);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "wr-gpios", 0, &par->gpio.wr);
ret = fbtft_request_one_gpio(par, "wr", 0, &par->gpio.wr);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "cs-gpios", 0, &par->gpio.cs);
ret = fbtft_request_one_gpio(par, "cs", 0, &par->gpio.cs);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "latch-gpios", 0, &par->gpio.latch);
ret = fbtft_request_one_gpio(par, "latch", 0, &par->gpio.latch);
if (ret)
return ret;
for (i = 0; i < 16; i++) {
ret = fbtft_request_one_gpio(par, "db-gpios", i,
ret = fbtft_request_one_gpio(par, "db", i,
&par->gpio.db[i]);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "led-gpios", i,
ret = fbtft_request_one_gpio(par, "led", i,
&par->gpio.led[i]);
if (ret)
return ret;
ret = fbtft_request_one_gpio(par, "aux-gpios", i,
ret = fbtft_request_one_gpio(par, "aux", i,
&par->gpio.aux[i]);
if (ret)
return ret;
@ -234,9 +231,9 @@ static void fbtft_reset(struct fbtft_par *par)
if (!par->gpio.reset)
return;
fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
gpiod_set_value_cansleep(par->gpio.reset, 0);
usleep_range(20, 40);
gpiod_set_value_cansleep(par->gpio.reset, 1);
usleep_range(20, 40);
gpiod_set_value_cansleep(par->gpio.reset, 0);
msleep(120);
}
@ -921,7 +918,7 @@ static int fbtft_init_display_dt(struct fbtft_par *par)
return -EINVAL;
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
while (p) {
@ -1012,7 +1009,7 @@ int fbtft_init_display(struct fbtft_par *par)
}
par->fbtftops.reset(par);
if (!par->gpio.cs)
if (par->gpio.cs)
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
i = 0;

2
drivers/staging/gasket/apex_driver.c
View File

@ -532,7 +532,7 @@ static ssize_t sysfs_show(struct device *device, struct device_attribute *attr,
break;
case ATTR_KERNEL_HIB_SIMPLE_PAGE_TABLE_SIZE:
ret = scnprintf(buf, PAGE_SIZE, "%u\n",
gasket_page_table_num_entries(
gasket_page_table_num_simple_entries(
gasket_dev->page_table[0]));
break;
case ATTR_KERNEL_HIB_NUM_ACTIVE_PAGES:

3
drivers/staging/unisys/visornic/visornic_main.c
View File

@ -1750,7 +1750,8 @@ static int visornic_poll(struct napi_struct *napi, int budget)
}
/* poll_for_irq - checks the status of the response queue
* @v: Void pointer to the visronic devdata struct.
* @t: pointer to the 'struct timer_list' from which we can retrieve the
* the visornic devdata struct.
*
* Main function of the vnic_incoming thread. Periodically check the response
* queue and drain it if needed.

1
drivers/staging/wilc1000/wilc_wfi_cfgoperations.c
View File

@ -1969,6 +1969,7 @@ void wilc_deinit_host_int(struct net_device *net)
priv->p2p_listen_state = false;
flush_workqueue(vif->wilc->hif_workqueue);
mutex_destroy(&priv->scan_req_lock);
ret = wilc_deinit(vif);