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mmc: sdhci-msm: dump vendor specific registers during error

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Implement dump_vendor_registers host operation to print the
vendor specific registers in addition to standard SDHC
register during error conditions.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1590139950-7288-9-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Sarthak Garg 2020-05-22 15:02:30 +05:30 committed by Ulf Hansson
parent d1fe0762f3
commit 16d18d893c
1 changed files with 31 additions and 0 deletions
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31
drivers/mmc/host/sdhci-msm.c
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@ -1874,6 +1874,36 @@ static void sdhci_msm_reset(struct sdhci_host *host, u8 mask)
sdhci_reset(host, mask); sdhci_reset(host, mask);
} }
#define DRIVER_NAME "sdhci_msm"
#define SDHCI_MSM_DUMP(f, x...) \
pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
void sdhci_msm_dump_vendor_regs(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
const struct sdhci_msm_offset *msm_offset = msm_host->offset;
SDHCI_MSM_DUMP("----------- VENDOR REGISTER DUMP -----------\n");
SDHCI_MSM_DUMP(
"DLL sts: 0x%08x | DLL cfg: 0x%08x | DLL cfg2: 0x%08x\n",
readl_relaxed(host->ioaddr + msm_offset->core_dll_status),
readl_relaxed(host->ioaddr + msm_offset->core_dll_config),
readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2));
SDHCI_MSM_DUMP(
"DLL cfg3: 0x%08x | DLL usr ctl: 0x%08x | DDR cfg: 0x%08x\n",
readl_relaxed(host->ioaddr + msm_offset->core_dll_config_3),
readl_relaxed(host->ioaddr + msm_offset->core_dll_usr_ctl),
readl_relaxed(host->ioaddr + msm_offset->core_ddr_config));
SDHCI_MSM_DUMP(
"Vndr func: 0x%08x | Vndr func2 : 0x%08x Vndr func3: 0x%08x\n",
readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec),
readl_relaxed(host->ioaddr +
msm_offset->core_vendor_spec_func2),
readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3));
}
static const struct sdhci_msm_variant_ops mci_var_ops = { static const struct sdhci_msm_variant_ops mci_var_ops = {
.msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed, .msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed,
.msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed, .msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed,
@ -1929,6 +1959,7 @@ static const struct sdhci_ops sdhci_msm_ops = {
.write_w = sdhci_msm_writew, .write_w = sdhci_msm_writew,
.write_b = sdhci_msm_writeb, .write_b = sdhci_msm_writeb,
.irq = sdhci_msm_cqe_irq, .irq = sdhci_msm_cqe_irq,
.dump_vendor_regs = sdhci_msm_dump_vendor_regs,
}; };
static const struct sdhci_pltfm_data sdhci_msm_pdata = { static const struct sdhci_pltfm_data sdhci_msm_pdata = {