From 97c39c7a0965b3eba87baa2b7d51443a46e21b8f Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Thu, 9 Nov 2023 19:44:44 +0100 Subject: [PATCH 01/31] arm64: dts: rockchip: add analog audio to RK3588 EVB1 Add support for the EVB1 analog audio to its devicetree. Only the headphone has been tested, since I don't have matching peripherals to test headset or speakers. I also didn't manage to record sound from the onboard microphone, but that also fails with the vendor kernel. Thus I assume the microphone on my board is fried. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20231109184453.108676-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3588-evb1-v10.dts | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index b9d789d57862..3369065f897d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -56,6 +56,63 @@ }; }; + analog-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_detect>; + simple-audio-card,name = "RK3588 EVB1 Audio"; + simple-audio-card,aux-devs = <&_headphone>, <&_speaker>; + simple-audio-card,bitclock-master = <&masterdai>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&masterdai>; + simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,pin-switches = "Headphones", "Speaker"; + simple-audio-card,routing = + "Speaker Amplifier INL", "LOUT2", + "Speaker Amplifier INR", "ROUT2", + "Speaker", "Speaker Amplifier OUTL", + "Speaker", "Speaker Amplifier OUTR", + "Headphones Amplifier INL", "LOUT1", + "Headphones Amplifier INR", "ROUT1", + "Headphones", "Headphones Amplifier OUTL", + "Headphones", "Headphones Amplifier OUTR", + "LINPUT1", "Onboard Microphone", + "RINPUT1", "Onboard Microphone", + "LINPUT2", "Microphone Jack", + "RINPUT2", "Microphone Jack"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Microphone", "Onboard Microphone", + "Headphone", "Headphones", + "Speaker", "Speaker"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + + masterdai: simple-audio-card,codec { + sound-dai = <&es8388>; + system-clock-frequency = <12288000>; + }; + }; + + amp_headphone: headphone-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&headphone_amplifier_en>; + sound-name-prefix = "Headphones Amplifier"; + }; + + amp_speaker: speaker-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&speaker_amplifier_en>; + sound-name-prefix = "Speaker Amplifier"; + }; + backlight: backlight { compatible = "pwm-backlight"; power-supply = <&vcc12v_dcin>; @@ -240,6 +297,32 @@ }; }; +&i2c7 { + status = "okay"; + + es8388: audio-codec@11 { + compatible = "everest,es8388"; + reg = <0x11>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + AVDD-supply = <&avcc_1v8_codec_s0>; + DVDD-supply = <&avcc_1v8_codec_s0>; + HPVDD-supply = <&vcc_3v3_s0>; + PVDD-supply = <&vcc_3v3_s0>; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; +}; + &mdio0 { rgmii_phy: ethernet-phy@1 { /* RTL8211F */ @@ -273,6 +356,20 @@ }; &pinctrl { + audio { + hp_detect: headphone-detect { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + headphone_amplifier_en: headphone-amplifier-en { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + speaker_amplifier_en: speaker-amplifier-en { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + rtl8111 { rtl8111_isolate: rtl8111-isolate { rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; From 213615d742f0c039ab73f8946ae18000cf2c7b65 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Fri, 17 Nov 2023 14:25:34 -0600 Subject: [PATCH 02/31] dt-bindings: arm: rockchip: Add Powkiddy RK2023 The Powkiddy RK2023 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. Group the Powkiddy RK3566 based devices together as they are both extremely similar. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231117202536.1387815-5-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..5b015c4ed775 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -674,9 +674,11 @@ properties: - const: pine64,soquartz - const: rockchip,rk3566 - - description: Powkiddy RGB30 + - description: Powkiddy RK3566 Handheld Gaming Console items: - - const: powkiddy,rgb30 + - enum: + - powkiddy,rgb30 + - powkiddy,rk2023 - const: rockchip,rk3566 - description: Radxa Compute Module 3(CM3) From 46d84ceb7eec85b60e8a5eb0dfb2fae6a1bf4166 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Fri, 17 Nov 2023 14:25:35 -0600 Subject: [PATCH 03/31] arm64: dts: rockchip: Update powkiddy,rgb30 include to rk2023 DTSI The Powkiddy RGB30 device is similar to the Anbernic RGxx3 series, however there are several differences which require deleting nodes in order to properly define the hardware. This was deemed unacceptable for the RK2023, so instead create a common include file for the Powkiddy RGB30 and the Powkiddy RK2023. The only notable difference between these Powkiddy devices are the panel in use, the device name, and the PLL_VPLL frequency necessary to support the different panels. Since the RK2023 was released on the market first, name the common include file after it. Signed-off-by: Chris Morgan Link: https://lore.kernel.org/r/20231117202536.1387815-6-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- .../dts/rockchip/rk3566-powkiddy-rgb30.dts | 152 +-- .../dts/rockchip/rk3566-powkiddy-rk2023.dtsi | 875 ++++++++++++++++++ 2 files changed, 890 insertions(+), 137 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts index 1ead3c5c24b3..0ac64f043b80 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts @@ -5,67 +5,11 @@ #include #include #include -#include "rk3566-anbernic-rg353x.dtsi" +#include "rk3566-powkiddy-rk2023.dtsi" / { model = "RGB30"; compatible = "powkiddy,rgb30", "rockchip,rk3566"; - - aliases { - mmc1 = &sdmmc0; - mmc2 = &sdmmc1; - mmc3 = &sdmmc2; - }; - - battery: battery { - compatible = "simple-battery"; - charge-full-design-microamp-hours = <3151000>; - charge-term-current-microamp = <300000>; - constant-charge-current-max-microamp = <2000000>; - constant-charge-voltage-max-microvolt = <4250000>; - factory-internal-resistance-micro-ohms = <117000>; - voltage-max-design-microvolt = <4172000>; - voltage-min-design-microvolt = <3400000>; - - ocv-capacity-celsius = <20>; - ocv-capacity-table-0 = <4172000 100>, <4092000 95>, <4035000 90>, <3990000 85>, - <3939000 80>, <3895000 75>, <3852000 70>, <3807000 65>, - <3762000 60>, <3713000 55>, <3672000 50>, <3647000 45>, - <3629000 40>, <3613000 35>, <3598000 30>, <3578000 25>, - <3550000 20>, <3519000 15>, <3479000 10>, <3438000 5>, - <3400000 0>; - }; - - /* - * Channels reversed for speakers. Headphones automatically switch via hardware when - * detected with no ability to control output in software. Headphones appear to be mono - * (each output channel receives all audio). No microphone support on 3.5mm jack. - */ - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "rk817_ext"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,widgets = - "Headphone", "Headphones"; - simple-audio-card,routing = - "Headphones", "HPOL", - "Headphones", "HPOR"; - - simple-audio-card,codec { - sound-dai = <&rk817>; - }; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - }; -}; - -/delete-node/ &adc_keys; - -&chosen { - /delete-property/ stdout-path; }; &cru { @@ -75,87 +19,21 @@ <200000000>, <292500000>; }; -&gpio_keys_control { - button-r1 { - gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; - label = "TR"; - linux,code = ; - }; +&dsi0 { + panel: panel@0 { + compatible = "powkiddy,rgb30-panel"; + reg = <0>; + backlight = <&backlight>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rst>; + reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + vcc-supply = <&vcc3v3_lcd0_n>; + iovcc-supply = <&vcc3v3_lcd0_n>; - button-r2 { - gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; - label = "TR2"; - linux,code = ; - }; -}; - -/delete-node/ &{/i2c@fdd40000/regulator@40}; - -&i2c0 { - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1390000>; - regulator-name = "vdd_cpu"; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_sys>; - regulator-state-mem { - regulator-off-in-suspend; + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; }; }; }; - -/* - * Device has 2 red LEDs instead of an amber and a red. Relabel LEDs as - * red_led0 and red_led1. - */ -/delete-node/ &{/pwm-leds/led-1}; -/delete-node/ &{/pwm-leds/led-2}; - -&leds { - red_led0: led-1 { - color = ; - function = LED_FUNCTION_CHARGING; - max-brightness = <255>; - pwms = <&pwm7 0 25000 0>; - }; - - red_led1: led-2 { - color = ; - default-state = "off"; - function = LED_FUNCTION_STATUS; - max-brightness = <255>; - pwms = <&pwm0 0 25000 0>; - }; -}; - -&panel { - compatible = "powkiddy,rgb30-panel"; - vcc-supply = <&vcc3v3_lcd0_n>; - iovcc-supply = <&vcc3v3_lcd0_n>; - /delete-property/ vdd-supply; -}; - -&pwm5 { - status = "disabled"; -}; - -&rk817 { - rk817_charger: charger { - monitored-battery = <&battery>; - rockchip,resistor-sense-micro-ohms = <10000>; - rockchip,sleep-enter-current-microamp = <300000>; - rockchip,sleep-filter-current-microamp = <100000>; - }; -}; - -/* There is no UART header visible on the board for this device. */ -&uart2 { - status = "disabled"; -}; - -/delete-node/ &vibrator; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi new file mode 100644 index 000000000000..0fa8f06f94cd --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi @@ -0,0 +1,875 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + aliases { + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc_mux 0>, + <&adc_mux 1>, + <&adc_mux 2>, + <&adc_mux 3>; + pinctrl-0 = <&joy_mux_en>; + pinctrl-names = "default"; + poll-interval = <60>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = ; + }; + + axis@1 { + reg = <1>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@2 { + reg = <2>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@3 { + reg = <3>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = ; + }; + }; + + adc_mux: adc-mux { + compatible = "io-channel-mux"; + channels = "left_x", "right_x", "left_y", "right_y"; + #io-channel-cells = <1>; + io-channels = <&saradc 3>; + io-channel-names = "parent"; + mux-controls = <&gpio_mux>; + settle-time-us = <100>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; + + battery: battery { + compatible = "simple-battery"; + charge-full-design-microamp-hours = <3151000>; + charge-term-current-microamp = <300000>; + constant-charge-current-max-microamp = <2000000>; + constant-charge-voltage-max-microvolt = <4250000>; + factory-internal-resistance-micro-ohms = <117000>; + voltage-max-design-microvolt = <4172000>; + voltage-min-design-microvolt = <3400000>; + + ocv-capacity-celsius = <20>; + ocv-capacity-table-0 = <4172000 100>, <4092000 95>, <4035000 90>, <3990000 85>, + <3939000 80>, <3895000 75>, <3852000 70>, <3807000 65>, + <3762000 60>, <3713000 55>, <3672000 50>, <3647000 45>, + <3629000 40>, <3613000 35>, <3598000 30>, <3578000 25>, + <3550000 20>, <3519000 15>, <3479000 10>, <3438000 5>, + <3400000 0>; + }; + + gpio_keys_control: gpio-keys-control { + compatible = "gpio-keys"; + pinctrl-0 = <&btn_pins_ctrl>; + pinctrl-names = "default"; + + button-a { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = ; + }; + + button-b { + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>; + label = "SOUTH"; + linux,code = ; + }; + + button-down { + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; + label = "DPAD-DOWN"; + linux,code = ; + }; + + button-l1 { + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; + label = "TL"; + linux,code = ; + }; + + button-l2 { + gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; + label = "TL2"; + linux,code = ; + }; + + button-left { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = ; + }; + + button-r1 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = ; + }; + + button-r2 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = ; + }; + + button-right { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = ; + }; + + button-select { + gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + label = "SELECT"; + linux,code = ; + }; + + button-start { + gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + label = "START"; + linux,code = ; + }; + + button-thumbl { + gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + label = "THUMBL"; + linux,code = ; + }; + + button-thumbr { + gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + label = "THUMBR"; + linux,code = ; + }; + + button-up { + gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; + label = "DPAD-UP"; + linux,code = ; + }; + + button-x { + gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + label = "NORTH"; + linux,code = ; + }; + + button-y { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = ; + }; + }; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + pinctrl-0 = <&btn_pins_vol>; + pinctrl-names = "default"; + + button-vol-down { + gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = ; + }; + + button-vol-up { + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = ; + }; + }; + + gpio_mux: mux-controller { + compatible = "gpio-mux"; + mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>, + <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; + #mux-control-cells = <0>; + }; + + hdmi-con { + compatible = "hdmi-connector"; + ddc-i2c-bus = <&i2c5>; + type = "c"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + /* + * Device also includes an always on LED that is wired to the 5V input + * voltage and is on when the device is plugged in. + */ + leds: pwm-leds { + compatible = "pwm-leds"; + + green_led: led-0 { + color = ; + function = LED_FUNCTION_STATUS; + max-brightness = <255>; + pwms = <&pwm6 0 25000 0>; + }; + + red_led: led-1 { + color = ; + function = LED_FUNCTION_CHARGING; + max-brightness = <255>; + pwms = <&pwm7 0 25000 0>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + /* + * Channels reversed for speakers. Headphones automatically switch via hardware when + * detected with no ability to control output in software. Headphones appear to be mono + * (each output channel receives all audio). No microphone support on 3.5mm jack. + */ + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rk817_ext"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Headphone", "Headphones"; + simple-audio-card,routing = + "Headphones", "HPOL", + "Headphones", "HPOR"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + }; + + vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-0 = <&vcc_lcd_h>; + pinctrl-names = "default"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_lcd0_n"; + vin-supply = <&vcc_3v3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc_sys"; + }; + + vcc_wifi: regulator-vcc-wifi { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc_wifi_h>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ports { + dsi0_in: port@0 { + reg = <0>; + dsi0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dsi0>; + }; + }; + + dsi0_out: port@1 { + reg = <1>; + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; +}; + +&dsi_dphy0 { + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + pinctrl-0 = <&hdmitxm0_cec>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4700000>; + regulator-max-microvolt = <5400000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + rk817_charger: charger { + monitored-battery = <&battery>; + rockchip,resistor-sense-micro-ohms = <10000>; + rockchip,sleep-enter-current-microamp = <300000>; + rockchip,sleep-filter-current-microamp = <100000>; + }; + }; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-name = "vdd_cpu"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c5 { + pinctrl-0 = <&i2c5m1_xfer>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; + pinctrl-names = "default"; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pinctrl { + gpio-btns { + btn_pins_ctrl: btn-pins-ctrl { + rockchip,pins = + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + btn_pins_vol: btn-pins-vol { + rockchip,pins = + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + joy-mux { + joy_mux_en: joy-mux-en { + rockchip,pins = + <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc3v3-lcd { + vcc_lcd_h: vcc-lcd-h { + rockchip,pins = + <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-wifi { + vcc_wifi_h: vcc-wifi-h { + rockchip,pins = + <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; +}; + +&pwm4 { + status = "okay"; +}; + +&pwm6 { + status = "okay"; +}; + +&pwm7 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc1v8_dvp>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_wifi>; + vqmmc-supply = <&vcca1v8_pmu>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt"; + device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + phy-names = "usb2-phy", "usb3-phy"; + phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg = ; + remote-endpoint = <&dsi0_in_vp1>; + }; +}; From e926380ea2a2b10d01069917e6d678ca818f6ad8 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Fri, 17 Nov 2023 14:25:36 -0600 Subject: [PATCH 04/31] arm64: dts: rockchip: Add Powkiddy RK2023 Add support for the Powkiddy RK2023. The Powkiddy RK2023 is a handheld gaming device with a 3.5 inch screen powered by the Rockchip RK3566 SoC. The device looks physically different from the Powkiddy RGB30, but is functionally identical except for the panel. Signed-off-by: Chris Morgan Link: https://lore.kernel.org/r/20231117202536.1387815-7-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3566-powkiddy-rk2023.dts | 38 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index a18f33bf0c0e..f969618da352 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts new file mode 100644 index 000000000000..ba32d0793dca --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3566-powkiddy-rk2023.dtsi" + +/ { + model = "RK2023"; + compatible = "powkiddy,rk2023", "rockchip,rk3566"; +}; + +&cru { + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, + <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; + assigned-clock-rates = <32768>, <1200000000>, + <200000000>, <115200000>; +}; + +&dsi0 { + panel: panel@0 { + compatible = "powkiddy,rk2023-panel", "newvision,nv3051d"; + reg = <0>; + backlight = <&backlight>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rst>; + reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + vdd-supply = <&vcc3v3_lcd0_n>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; From 9ecf44fedc17ff267968b5fff589bf6793fc7ddd Mon Sep 17 00:00:00 2001 From: Jimmy Hon Date: Sun, 26 Nov 2023 14:08:45 -0600 Subject: [PATCH 05/31] arm64: dts: rockchip: add USB3 host on rk3588s-orangepi-5 Enable USB3 host controller for the Orange Pi 5. Signed-off-by: Jimmy Hon Link: https://lore.kernel.org/r/20231126200845.1192-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts index 8f399c4317bd..f7a6132d8205 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts @@ -660,3 +660,7 @@ &usb_host1_ohci { status = "okay"; }; + +&usb_host2_xhci { + status = "okay"; +}; From b685460632d51d7307bbba3d173c0dd6dbf38fa8 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sat, 25 Nov 2023 19:59:13 +0530 Subject: [PATCH 06/31] dt-bindings: arm: rockchip: Update edgeble-neu6 bindings Current binding has following compatible combination for SoM, IO board - NCM6A: edgeble,neural-compute-module-6a, edgeble,neural-compute-module-6a-io - NCM6B: edgeble,neural-compute-module-6b, edgeble,neural-compute-module-6b-io This board topology now changes in final revisions, so a common compatible IO board, NCM6A-IO, is made available for both variants of SoM: NCM6A and NCM6B, produced by Edgeble AI. With this change, 6b-io is not as available and 6a; 6b SoM's have the same compatible IO board as 6a-io. This change is due to the common optimised design of the IO board made available now in final revisions, which was not the case in initial revisions. Update the dt-bindings with this new change. Signed-off-by: Jagan Teki Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231125142914.57459-1-jagan@edgeble.ai Signed-off-by: Heiko Stuebner --- .../devicetree/bindings/arm/rockchip.yaml | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5b015c4ed775..e756977acd51 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -101,16 +101,12 @@ properties: - const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM - const: rockchip,rv1126 - - description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards + - description: Edgeble Neural Compute Module 6(Neu6) SoM based boards items: - - const: edgeble,neural-compute-module-6a-io # Edgeble Neural Compute Module 6A IO Board - - const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM - - const: rockchip,rk3588 - - - description: Edgeble Neural Compute Module 6(Neu6) Model B SoM based boards - items: - - const: edgeble,neural-compute-module-6b-io # Edgeble Neural Compute Module 6B IO Board - - const: edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM + - const: edgeble,neural-compute-module-6a-io # Edgeble NCM6A-IO Board + - enum: + - edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM + - edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM - const: rockchip,rk3588 - description: Elgin RV1108 R1 From 2e9b4e598d287c152261ac614b9517b68241b0d7 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sat, 25 Nov 2023 19:59:14 +0530 Subject: [PATCH 07/31] arm64: dts: rockchip: Use NCM6A-IO board for edgeble-neu6b Edgeble AI 6TOPS board topology is now changed in final revisions as a compatible IO board, NCM6A-IO, is made available for both variants of SoM: NCM6A and NCM6B. With this change, 6b-io is not as available and 6a; 6b SoM's have the same compatible IO board as 6a-io. This change is due to the common optimised design of the IO board made available now in final revisions, which was not the case in initial revisions. So, use the NCM6A-IO compatible for NCM6B SoM based IO dts. Signed-off-by: Jagan Teki Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231125142914.57459-2-jagan@edgeble.ai Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts index 9933765e4097..861067b5d707 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts @@ -9,7 +9,7 @@ / { model = "Edgeble Neu6B IO Board"; - compatible = "edgeble,neural-compute-module-6b-io", + compatible = "edgeble,neural-compute-module-6a-io", "edgeble,neural-compute-module-6b", "rockchip,rk3588"; aliases { From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001 From: Trevor Woerner Date: Mon, 20 Nov 2023 11:22:32 -0500 Subject: [PATCH 08/31] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as gpioinfo. [1] https://wiki.radxa.com/RockpiS/hardware/gpio [2] Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Trevor Woerner Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts index e9810d2f0407..f2d7251de298 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts @@ -250,3 +250,61 @@ &wdt { status = "okay"; }; + +&gpio0 { + gpio-line-names = + /* GPIO0_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO0_B0 - B7 */ + "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]", + "", "", "header1-pin11 [GPIO0_B7]", + /* GPIO0_C0 - C7 */ + "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "", + "", "", "", + /* GPIO0_D0 - D8 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = + /* GPIO1_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_B0 - B7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_C0 - C7 */ + "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", + "header1-pin19 [GPIO1_C7]", + /* GPIO1_D0 - D8 */ + "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "", + "", "", ""; +}; + +&gpio2 { + gpio-line-names = + /* GPIO2_A0 - A7 */ + "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "", + "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", + "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", + /* GPIO2_B0 - B7 */ + "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", + "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", + "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", + "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", + /* GPIO2_C0 - C7 */ + "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", + /* GPIO2_D0 - D8 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + /* GPIO3_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO3_B0 - B7 */ + "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]", + "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "", + /* GPIO3_C0 - C7 */ + "", "", "", "", "", "", "", "", + /* GPIO3_D0 - D8 */ + "", "", "", "", "", "", "", ""; +}; From 20d03e13841e299ec665a4297865cf37fb6ca36d Mon Sep 17 00:00:00 2001 From: shironeko Date: Thu, 16 Nov 2023 16:40:43 -0500 Subject: [PATCH 09/31] arm64: dts: rockchip: add missing tx/rx-fifo-depth for rk3328 gmac Without fifo depths attempting to change the MTU will fail. These values are from the RK3328 Technical Reference Manual, gmac2io interface tested with Rock64. Signed-off-by: shironeko Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index e729e7a22b23..06af280083ae 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -916,6 +916,8 @@ resets = <&cru SRST_GMAC2IO_A>; reset-names = "stmmaceth"; rockchip,grf = <&grf>; + tx-fifo-depth = <2048>; + rx-fifo-depth = <4096>; snps,txpbl = <0x4>; status = "disabled"; }; @@ -938,6 +940,8 @@ reset-names = "stmmaceth"; phy-mode = "rmii"; phy-handle = <&phy>; + tx-fifo-depth = <2048>; + rx-fifo-depth = <4096>; snps,txpbl = <0x4>; clock_in_out = "output"; status = "disabled"; From f97d78b9f6cff4c680206a8c8b03f726f0dc2c8b Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 6 Nov 2023 16:54:31 +0100 Subject: [PATCH 10/31] arm64: dts: rockchip: add USB3 host to rock-5b Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index 741f631db345..61b937beca7f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -138,6 +138,10 @@ status = "okay"; }; +&combphy2_psu { + status = "okay"; +}; + &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; }; @@ -765,3 +769,7 @@ &usb_host1_ohci { status = "okay"; }; + +&usb_host2_xhci { + status = "okay"; +}; From 0773a4a199aabb60afe50f5a19a6772abf4ad0bf Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 6 Nov 2023 16:54:32 +0100 Subject: [PATCH 11/31] arm64: dts: rockchip: add USB3 host to rock-5a Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index 8347adcbd003..6fb03294576c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -114,6 +114,10 @@ }; }; +&combphy2_psu { + status = "okay"; +}; + &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; }; @@ -734,3 +738,7 @@ &usb_host1_ohci { status = "okay"; }; + +&usb_host2_xhci { + status = "okay"; +}; From 18f413c5dc285373ad440a5054f760a6a0452d48 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 4 Dec 2023 12:57:18 -0600 Subject: [PATCH 12/31] dt-bindings: arm: rockchip: Add Powkiddy X55 The Powkiddy X55 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. This device is somewhat similar to the existing Powkiddy RK3566 devices, which have been grouped together with a previous commit[1]. [1] https://lore.kernel.org/linux-rockchip/20231117202536.1387815-1-macroalpha82@gmail.com/T/#m4764997cfafaca22fe677200de96caa5fb8f0005 Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231204185719.569021-10-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e756977acd51..e5f19dd2ff38 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -675,6 +675,7 @@ properties: - enum: - powkiddy,rgb30 - powkiddy,rk2023 + - powkiddy,x55 - const: rockchip,rk3566 - description: Radxa Compute Module 3(CM3) From e99adc97e21afbe33cd2b20b9869dbdc682e2b06 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 4 Dec 2023 12:57:19 -0600 Subject: [PATCH 13/31] arm64: dts: rockchip: Add Powkiddy X55 Add support for the Powkiddy X55. The Powkiddy X55 is a handheld gaming device with a 720p 5.5 inch screen powered by the Rockchip RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC joysticks powered by 4 dedicated ADC channels, and several GPIO face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), and an 8GB internal eMMC. Signed-off-by: Chris Morgan Link: https://lore.kernel.org/r/20231204185719.569021-11-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3566-powkiddy-x55.dts | 926 ++++++++++++++++++ 2 files changed, 927 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index f969618da352..3ccfeaa4fe4e 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts new file mode 100644 index 000000000000..4786b19fd017 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts @@ -0,0 +1,926 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + model = "Powkiddy x55"; + compatible = "powkiddy,x55", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc2; + mmc3 = &sdmmc1; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc_joystick: adc-joystick { + compatible = "adc-joystick"; + io-channels = <&saradc 0>, <&saradc 1>, + <&saradc 2>, <&saradc 3>; + poll-interval = <60>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@1 { + reg = <1>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <1023 15>; + linux,code = ; + }; + + axis@2 { + reg = <2>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@3 { + reg = <3>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <1023 15>; + linux,code = ; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; + + battery: battery { + compatible = "simple-battery"; + charge-full-design-microamp-hours = <4000000>; + charge-term-current-microamp = <300000>; + constant-charge-current-max-microamp = <2000000>; + constant-charge-voltage-max-microvolt = <4300000>; + factory-internal-resistance-micro-ohms = <91000>; + voltage-max-design-microvolt = <4138000>; + voltage-min-design-microvolt = <3400000>; + + ocv-capacity-celsius = <20>; + ocv-capacity-table-0 = <4138000 100>, <4083000 95>, <4059000 90>, <4044000 85>, + <4030000 80>, <4020000 75>, <4006000 70>, <3972000 65>, + <3934000 60>, <3904000 55>, <3878000 50>, <3857000 45>, + <3843000 40>, <3826000 35>, <3801000 30>, <3768000 25>, + <3735000 20>, <3688000 15>, <3621000 10>, <3553000 5>, + <3400000 0>; + }; + + gpio_keys_control: gpio-keys-control { + compatible = "gpio-keys"; + pinctrl-0 = <&btn_pins_ctrl>; + pinctrl-names = "default"; + + button-a { + gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = ; + }; + + button-b { + gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; + label = "SOUTH"; + linux,code = ; + }; + + button-down { + gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + label = "DPAD-DOWN"; + linux,code = ; + }; + + button-l1 { + gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>; + label = "TL"; + linux,code = ; + }; + + button-l2 { + gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; + label = "TL2"; + linux,code = ; + }; + + button-left { + gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = ; + }; + + button-right { + gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = ; + }; + + button-select { + gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>; + label = "SELECT"; + linux,code = ; + }; + + button-start { + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + label = "START"; + linux,code = ; + }; + + button-thumbl { + gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>; + label = "THUMBL"; + linux,code = ; + }; + + button-thumbr { + gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; + label = "THUMBR"; + linux,code = ; + }; + + button-r1 { + gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = ; + }; + + button-r2 { + gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = ; + }; + + button-up { + gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + label = "DPAD-UP"; + linux,code = ; + }; + + button-x { + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + label = "NORTH"; + linux,code = ; + }; + + button-y { + gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = ; + }; + }; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + pinctrl-0 = <&btn_pins_vol>; + pinctrl-names = "default"; + + button-voldown { + gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = ; + }; + + button-volup { + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = ; + }; + }; + + gpio_leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + red_led: led-0 { + color = ; + default-state = "off"; + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_STATUS; + }; + + green_led: led-1 { + color = ; + default-state = "on"; + gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_POWER; + }; + + amber_led: led-2 { + color = ; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_CHARGING; + }; + + }; + + hdmi-con { + compatible = "hdmi-connector"; + ddc-i2c-bus = <&i2c5>; + type = "c"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; + }; + + /* Channels reversed for both headphones and speakers. */ + sound { + compatible = "simple-audio-card"; + pinctrl-0 = <&hp_det>; + pinctrl-names = "default"; + simple-audio-card,name = "rk817_ext"; + simple-audio-card,aux-devs = <&spk_amp>; + simple-audio-card,format = "i2s"; + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Internal Speakers"; + simple-audio-card,routing = + "MICL", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Internal Speakers", "Speaker Amp OUTL", + "Internal Speakers", "Speaker Amp OUTR", + "Speaker Amp INL", "HPOL", + "Speaker Amp INR", "HPOR"; + simple-audio-card,pin-switches = "Internal Speakers"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + }; + + spk_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spk_amp_enable_h>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Amp"; + }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc5v0_host_en>; + pinctrl-names = "default"; + regulator-name = "vcc5v0_host"; + vin-supply = <&dcdc_boost>; + }; + + vcc_lcd: regulator-vcc-lcd { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc_lcd_en>; + pinctrl-names = "default"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_lcd"; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc_sys"; + }; + + vcc_wifi: regulator-vcc-wifi { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&vcc_wifi_h>; + pinctrl-names = "default"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cru { + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, + <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; + assigned-clock-rates = <32768>, <1200000000>, + <200000000>, <126400000>; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dsi_dphy0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ports { + dsi0_in: port@0 { + reg = <0>; + dsi0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dsi0>; + }; + }; + + dsi0_out: port@1 { + reg = <1>; + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + panel: panel@0 { + compatible = "powkiddy,x55-panel", "himax,hx8394"; + reg = <0>; + backlight = <&backlight>; + iovcc-supply = <&vcc_lcd>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rst>; + reset-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; + rotation = <270>; + vcc-supply = <&vcc_lcd>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + pinctrl-0 = <&hdmitxm0_cec>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + clock-names = "mclk"; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clocks = <&cru I2S1_MCLKOUT_TX>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + #clock-cells = <1>; + #sound-dai-cells = <0>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-min-microvolt = <4700000>; + regulator-max-microvolt = <5400000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + rk817_charger: charger { + monitored-battery = <&battery>; + rockchip,resistor-sense-micro-ohms = <10000>; + rockchip,sleep-enter-current-microamp = <150000>; + rockchip,sleep-filter-current-microamp = <100000>; + }; + + }; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-name = "vdd_cpu"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c5 { + pinctrl-0 = <&i2c5m1_xfer>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx>, <&i2s1m0_lrcktx>, <&i2s1m0_sdi0>, + <&i2s1m0_sdo0>; + pinctrl-names = "default"; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pinctrl { + audio-amplifier { + spk_amp_enable_h: spk-amp-enable-h { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-control { + btn_pins_ctrl: btn-pins-ctrl { + rockchip,pins = + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + btn_pins_vol: btn-pins-vol { + rockchip,pins = + <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-leds { + led_pins: led-pins { + rockchip,pins = + <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hp-detect { + hp_det: hp-det { + rockchip,pins = + <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = + <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = + <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + vcc-lcd { + vcc_lcd_en: vcc-lcd-en { + rockchip,pins = + <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-wifi { + vcc_wifi_h: vcc-wifi-h { + rockchip,pins = + <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcca1v8_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcca1v8_pmu>; + vccio5-supply = <&vcc2v8_dvp>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; +}; + +&pwm4 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, + <&emmc_datastrobe>, <&emmc_rstnout>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-0 = <&sdmmc0_bus4>, <&sdmmc0_clk>, <&sdmmc0_cmd>, + <&sdmmc0_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc1_bus4>, <&sdmmc1_cmd>, <&sdmmc1_clk>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_wifi>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-0 = <&sdmmc2m1_bus4>, <&sdmmc2m1_cmd>, <&sdmmc2m1_clk>, + <&sdmmc2m1_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vqmmc-supply = <&vcc2v8_dvp>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1m0_xfer>, <&uart1m0_ctsn>, <&uart1m0_rtsn>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt"; + device-wake-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_xhci { + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg = ; + remote-endpoint = <&dsi0_in_vp1>; + }; +}; From ba2110e546705f410cea7bff06e1f19453290996 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 1 Dec 2023 20:11:02 +0100 Subject: [PATCH 14/31] dt-bindings: arm: rockchip: Add Theobroma-Systems Jaguar SBC Add the binding for the Jaguar board from Theobroma-Systems. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231201191103.343097-2-heiko@sntech.de --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e5f19dd2ff38..da13cd665fc2 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -874,6 +874,11 @@ properties: - const: tsd,rk3399-puma-haikou - const: rockchip,rk3399 + - description: Theobroma Systems RK3588-SBC Jaguar + items: + - const: tsd,rk3588-jaguar + - const: rockchip,rk3588 + - description: Tronsmart Orion R68 Meta items: - const: tronsmart,orion-r68-meta From d1b8b36a2cc5f4ef14774e37e09ebbe3bd702dbd Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 1 Dec 2023 20:11:03 +0100 Subject: [PATCH 15/31] arm64: dts: rockchip: add Theobroma Jaguar SBC Add a board dts for the Jaguar SBC from Theobroma-Systems JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR). It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20231201191103.343097-3-heiko@sntech.de --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../arm64/boot/dts/rockchip/rk3588-jaguar.dts | 803 ++++++++++++++++++ 2 files changed, 804 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 3ccfeaa4fe4e..41276ca535de 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts new file mode 100644 index 000000000000..4ce70fb75a30 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts @@ -0,0 +1,803 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH + */ + +/dts-v1/; +#include +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model = "Theobroma Systems RK3588-SBC Jaguar"; + compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ + button-bios-disable { + label = "BIOS_DISABLE"; + linux,code = ; + press-threshold-microvolt = <0>; + }; + }; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdhci; + mmc1 = &sdmmc; + rtc0 = &rtc_twi; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + /* DCIN is 12-24V but standard is 12V */ + dc_12v: dc-12v-regulator { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + pinctrl-0 = <&emmc_reset>; + pinctrl-names = "default"; + reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led1_pin>; + status = "okay"; + + /* LED1 on PCB */ + led-1 { + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_HEARTBEAT; + linux,default-trigger = "heartbeat"; + color = ; + }; + }; + + pps { + compatible = "pps-gpio"; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_1v2_s3: vcc-1v2-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v2_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Exposed on P14 and P15 */ + vcc_2v8_s3: vcc-2v8-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_2v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc_5v0_usb_a: vcc-5v0-usb-a-regulator { + compatible = "regulator-fixed"; + regulator-name = "usb_a_vcc"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_5v0_usb_c1: vcc-5v0-usb-c1-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_usbc1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_5v0_usb_c2: vcc-5v0-usb-c2-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_usbc2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc3v3_mdot2: vcc3v3-mdot2-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_mdot2"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy1_ps { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gmac0 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii"; + phy-supply = <&vcc_1v2_s3>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_rx_bus2 + &gmac0_tx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + ð0_pins + ð_reset>; + tx_delay = <0x10>; + rx_delay = <0x10>; + snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 100000>; + + status = "okay"; +}; + +&gpio1 { + mdot2e-w-disable1-n-hog { + gpios = ; + output-low; + line-name = "m.2 E-key W_DISABLE1#"; + gpio-hog; + }; +}; + +&gpio4 { + mdot2e-w-disable2-n-hog { + gpios = ; + output-low; + line-name = "m.2 E-key W_DISABLE2#"; + gpio-hog; + }; +}; + +&i2c0 { + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + }; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1m4_xfer>; +}; + +&i2c6 { + pinctrl-0 = <&i2c6m4_xfer>; +}; + +&i2c7 { + status = "okay"; + + /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ + + /* Also on 0x55 */ + eeprom@54 { + compatible = "st,24c04", "atmel,24c04"; + reg = <0x54>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_s3>; + }; +}; + +&i2c8 { + pinctrl-0 = <&i2c8m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&mdio0 { + rgmii_phy: ethernet-phy@6 { + /* KSZ9031 or KSZ9131 */ + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x6>; + clocks = <&cru REFCLKO25M_ETH0_OUT>; + }; +}; + +&pcie2x1l0 { + reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ + vpcie3v3-supply = <&vcc3v3_mdot2>; + status = "okay"; +}; + +&pinctrl { + emmc { + emmc_reset: emmc-reset { + rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ethernet { + eth_reset: eth-reset { + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led1_pin: led1-pin { + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + vref-supply = <&vcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + mmc-pwrseq = <&emmc_pwrseq>; + no-sdio; + no-sd; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; + supports-cqe; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + broken-cd; + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-name = "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-name = "vdd_log_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-name = "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-name = "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-name = "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name = "vdd_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-name = "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name = "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-name = "vcc_1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-name = "vcca_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-name = "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-name = "vdda_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-name = "vcca_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name = "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-name = "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name = "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-name = "vdda_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdda_0v75_s0: nldo-reg3 { + regulator-name = "vdda_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-name = "vdda_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-name = "vdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc_5v0_usb_a>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +/* Mule-ATtiny debug UART; typically baudrate 9600 */ +&uart0 { + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; + +/* Main debug interface on P20 micro-USB B port and P21 header */ +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* RS485 on P19 */ +&uart3 { + pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +/* Mule-ATtiny UPDI flashing UART */ +&uart7 { + pinctrl-0 = <&uart7m0_xfer>; + status = "okay"; +}; + +/* host0 on P10 USB-A */ +&usb_host0_ehci { + status = "okay"; +}; + +/* host0 on P10 USB-A */ +&usb_host0_ohci { + status = "okay"; +}; + +/* host1 on M.2 E-key */ +&usb_host1_ehci { + status = "okay"; +}; + +/* host1 on M.2 E-key */ +&usb_host1_ohci { + status = "okay"; +}; From 9918d10d16665527e59fdb87c5acac70cc1cfe8f Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 5 Dec 2023 17:48:39 +0100 Subject: [PATCH 16/31] arm64: dts: rockchip: move rk3588 serial aliases to soc dtsi The serial ports on rk3588 are named uart0 - uart9. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. To prevent each board repeating their list of serial aliases, move them to the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner Reviewed-by: Dragan Simic Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de --- .../boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts | 4 ---- .../boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts | 4 ---- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 1 - .../boot/dts/rockchip/rk3588-orangepi-5-plus.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 2 -- .../boot/dts/rockchip/rk3588s-indiedroid-nova.dts | 1 - .../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 1 - arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 13 +++++++++++++ 13 files changed, 13 insertions(+), 19 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts index b51543892078..be6a4f4f90f6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts @@ -12,10 +12,6 @@ compatible = "edgeble,neural-compute-module-6a-io", "edgeble,neural-compute-module-6a", "rockchip,rk3588"; - aliases { - serial2 = &uart2; - }; - chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts index 861067b5d707..070baeb63431 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts @@ -12,10 +12,6 @@ compatible = "edgeble,neural-compute-module-6a-io", "edgeble,neural-compute-module-6b", "rockchip,rk3588"; - aliases { - serial2 = &uart2; - }; - chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index 3369065f897d..bc11e2fdc54f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -17,7 +17,6 @@ aliases { mmc0 = &sdhci; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts index 97af4f912828..612107615e66 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -19,7 +19,6 @@ aliases { mmc0 = &sdhci; mmc1 = &sdmmc; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts index 298c183d6f4f..3e660ff6cd5f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts @@ -19,7 +19,6 @@ aliases { mmc0 = &sdhci; mmc1 = &sdmmc; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts index 5c59f9571dce..c7cd57609bc2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts @@ -19,7 +19,6 @@ aliases { mmc0 = &sdhci; mmc1 = &sdmmc; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index 61b937beca7f..74719aaf697c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -14,7 +14,6 @@ mmc0 = &sdhci; mmc1 = &sdmmc; mmc2 = &sdio; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi index 9570b34aca2e..25a0ca73a8f7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi @@ -19,8 +19,6 @@ aliases { ethernet0 = &gmac1; mmc0 = &sdhci; - serial2 = &uart2; - serial9 = &uart9; }; fan: pwm-fan { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts index 60f00ceb630e..dc677f29a9c7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts @@ -44,7 +44,6 @@ mmc0 = &sdhci; mmc1 = &sdmmc; mmc2 = &sdio; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 82478a452533..f53e993c785e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -12,7 +12,6 @@ aliases { mmc0 = &sdhci; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts index f7a6132d8205..139131838cb6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts @@ -14,7 +14,6 @@ aliases { mmc0 = &sdmmc; - serial2 = &uart2; }; chosen { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index 6fb03294576c..a1a29bce794b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -14,7 +14,6 @@ aliases { mmc0 = &sdhci; mmc1 = &sdmmc; - serial2 = &uart2; }; analog-sound { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 7064c0e9179f..3947ca6836df 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -18,6 +18,19 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + serial8 = &uart8; + serial9 = &uart9; + }; + cpus { #address-cells = <1>; #size-cells = <0>; From 328e901b7b03d292c1520ffb38e9164feef4f1ea Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 5 Dec 2023 17:48:40 +0100 Subject: [PATCH 17/31] arm64: dts: rockchip: add rk3588 i2c aliases to soc dtsi The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace i2c access is a thing afterall. To prevent each board repeating their list of i2c aliases, define them in the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner Reviewed-by: Dragan Simic Link: https://lore.kernel.org/r/20231205164842.556684-3-heiko@sntech.de --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 3947ca6836df..fbc25a76b510 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -19,6 +19,15 @@ #size-cells = <2>; aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; From a024abedbca99a20aeb96f5beec9ded13c85dcb3 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 5 Dec 2023 17:48:41 +0100 Subject: [PATCH 18/31] arm64: dts: rockchip: add rk3588 gpio aliases to soc dtsi The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace gpio access is a thing afterall. To prevent each board repeating their list of gpio aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner Reviewed-by: Dragan Simic Link: https://lore.kernel.org/r/20231205164842.556684-4-heiko@sntech.de --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index fbc25a76b510..7d55d5bf704b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -19,6 +19,11 @@ #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; From a86e88043de929da76f7f6cf0990ba92aed8391a Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 5 Dec 2023 17:48:42 +0100 Subject: [PATCH 19/31] arm64: dts: rockchip: add rk3588 spi aliases to soc dtsi The spi controllers on rk3588 are named spi0 - spi4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace spi access is a thing afterall. To prevent each board repeating their list of spi aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner Reviewed-by: Dragan Simic Link: https://lore.kernel.org/r/20231205164842.556684-5-heiko@sntech.de --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 7d55d5bf704b..136cafbe304e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -43,6 +43,11 @@ serial7 = &uart7; serial8 = &uart8; serial9 = &uart9; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; }; cpus { From f56804453a7f41a37d14f7ad325af6231a84a82a Mon Sep 17 00:00:00 2001 From: Lukasz Luba Date: Mon, 27 Nov 2023 08:15:11 +0000 Subject: [PATCH 20/31] arm64: dts: rockchip: Add dynamic-power-coefficient to rk3399 GPU Add dynamic-power-coefficient to the GPU node. That will create Energy Model for the GPU based on the coefficient and OPP table information. It will enable mechanism such as DTMP or IPA to work with the GPU DVFS. In similar way the Energy Model for CPUs in rk3399 is created, so both are aligned in power scale. The maximum power used from this coefficient is 1.5W at 600MHz. Signed-off-by: Lukasz Luba Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index faf02e59d6c7..a2c209c6e297 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2112,6 +2112,7 @@ interrupt-names = "job", "mmu", "gpu"; clocks = <&cru ACLK_GPU>; #cooling-cells = <2>; + dynamic-power-coefficient = <2640>; power-domains = <&power RK3399_PD_GPU>; status = "disabled"; }; From 998513442cb2e3a8c3a538584f784eccef122a6e Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 2 Dec 2023 19:22:58 +0100 Subject: [PATCH 21/31] arm64: dts: rockchip: add gpio alias for gpio dt nodes Rockchip SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board add the aliases to SoC dtsi files. Co-developed-by: Jianqun Xu Signed-off-by: Jianqun Xu Signed-off-by: Johan Jonker Reviewed-by: Dragan Simic Link: https://lore.kernel.org/r/56daeead-1d35-44bb-00c0-614b84a986de@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ 4 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 2ae4bb7d5e62..cfc0a87b5195 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -20,6 +20,11 @@ #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 06af280083ae..8e0f686d8faa 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -20,6 +20,10 @@ #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a4c5aaf1f457..fc7e3f2bc786 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -20,6 +20,10 @@ aliases { ethernet0 = &gmac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index a2c209c6e297..b242b2642e68 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -20,6 +20,11 @@ aliases { ethernet0 = &gmac; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; From c87847cfc1f4e09a1ad9a5dd04b862da81c8102e Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Sat, 9 Dec 2023 18:15:40 +0100 Subject: [PATCH 22/31] arm64: dts: rockchip: make dts use gpio-fan matrix instead of array No functional changes. Adjust to comply with dt-schema requirements and make possible to validate values. Acked-by: Heiko Stuebner Signed-off-by: David Heidelberg Link: https://lore.kernel.org/r/20231209171653.85468-2-david@ixit.cz Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 2 +- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi index e6ac292ce645..69dd3568b84e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi @@ -44,7 +44,7 @@ fan0: gpio-fan { #cooling-cells = <2>; compatible = "gpio-fan"; - gpio-fan,speed-map = <0 0 3000 1>; + gpio-fan,speed-map = <0 0>, <3000 1>; gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 854d02b46e6f..59843a7a199c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -31,8 +31,9 @@ fan: gpio_fan { compatible = "gpio-fan"; gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = <0 0 - 4500 1>; + gpio-fan,speed-map = + < 0 0>, + <4500 1>; pinctrl-names = "default"; pinctrl-0 = <&fan_en_h>; #cooling-cells = <2>; From 5d90cb1edcf7c1854e4cecb52871421f29d3d849 Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 08:53:48 +0100 Subject: [PATCH 23/31] arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3399 Not all supported boards actually use the RK3399's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/20879826c01fb9ead71c339866846ea794669802.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts | 1 + arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 - arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 1 + 19 files changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts b/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts index 6464ef4d113d..173da81fc231 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts @@ -15,6 +15,7 @@ compatible = "openailab,eaidk-610", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts index 3d1e126b553f..55eca7a50a1f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts @@ -12,6 +12,7 @@ compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdhci; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts index 1ce85a5816e4..30e4879f322c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts @@ -13,6 +13,10 @@ model = "96boards RK3399 Ficus"; compatible = "vamrs,ficus", "rockchip,rk3399"; + aliases { + ethernet0 = &gmac; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts index c5db64f3e124..260415d99aeb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts @@ -16,6 +16,7 @@ compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts index 7af27e8216f1..4a6ab6c2e24c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts @@ -11,6 +11,7 @@ compatible = "hugsun,x99", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts index 8302e51def52..99ac4ed0f13f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts @@ -10,6 +10,10 @@ / { model = "Khadas Edge-Captain"; compatible = "khadas,edge-captain", "rockchip,rk3399"; + + aliases { + ethernet0 = &gmac; + }; }; &gmac { diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts index f5dcb99dc349..e12e7b4d64ca 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts @@ -10,6 +10,10 @@ / { model = "Khadas Edge-V"; compatible = "khadas,edge-v", "rockchip,rk3399"; + + aliases { + ethernet0 = &gmac; + }; }; &gmac { diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts index 1eb287a3f8c0..9e3aec4440bd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts @@ -19,6 +19,7 @@ compatible = "kobol,helios64", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdmmc; mmc1 = &sdhci; spi1 = &spi1; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts index a21ac319f809..cb69e2145fa9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts @@ -15,6 +15,7 @@ compatible = "leez,p710", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi index 7c5f441a2219..b7f1e47978a6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi @@ -18,6 +18,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts index dba4d03bfc2b..e7551449e718 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts @@ -17,6 +17,7 @@ compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi index 20e3f41efe97..574a775ca880 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -9,6 +9,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &sdhci; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi index c32913df93c3..ca7a446b6568 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi @@ -14,6 +14,7 @@ compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdmmc; mmc1 = &sdhci; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts index 8bfd5f88d1ef..7baf9d1b22fd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts @@ -15,6 +15,7 @@ compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdhci; mmc1 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi index f2279aa6ca9e..281a12180703 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi @@ -12,6 +12,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &sdhci; mmc1 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi index bca2b50e0a93..f30b82a10ca3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi @@ -11,6 +11,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &sdmmc; mmc2 = &sdhci; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi index 69dd3568b84e..b3ef1c85e754 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi @@ -12,6 +12,7 @@ compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; aliases { + ethernet0 = &gmac; mmc0 = &sdmmc; mmc1 = &sdhci; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index b242b2642e68..b0c45a99a0e4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -19,7 +19,6 @@ #size-cells = <2>; aliases { - ethernet0 = &gmac; gpio0 = &gpio0; gpio1 = &gpio1; gpio2 = &gpio2; diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi index 8b8992a8e9c0..8823c924dc1d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi @@ -13,6 +13,7 @@ compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; aliases { + ethernet0 = &gmac; mmc0 = &sdhci; mmc1 = &sdmmc; }; From c900fef5deffdc533a6468cc4e72eda348e1857e Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 08:53:49 +0100 Subject: [PATCH 24/31] arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3368 Not all supported boards actually use the RK3368's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3368 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/77115184d633190c917d868f883070e100d93dbc.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 1 + arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts | 1 + arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 1 + arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 - 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi index e47d1398aeca..b48b98c13705 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi @@ -9,6 +9,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts index be06e6e64d18..029b8e22e709 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts @@ -12,6 +12,7 @@ compatible = "geekbuying,geekbox", "rockchip,rk3368"; aliases { + ethernet0 = &gmac; mmc0 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi index 5753e57fd716..8ac8acf4082d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi @@ -8,6 +8,7 @@ / { aliases { + ethernet0 = &gmac; mmc0 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts index 81d1064fdb21..dcee2e28916f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts @@ -12,6 +12,7 @@ compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368"; aliases { + ethernet0 = &gmac; mmc0 = &sdmmc; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts index 5589f3db6b36..b16b7ca02379 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts @@ -12,6 +12,7 @@ compatible = "rockchip,r88", "rockchip,rk3368"; aliases { + ethernet0 = &gmac; mmc0 = &sdio0; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index fc7e3f2bc786..62af0cb94839 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -19,7 +19,6 @@ #size-cells = <2>; aliases { - ethernet0 = &gmac; gpio0 = &gpio0; gpio1 = &gpio1; gpio2 = &gpio2; From 9012ab6bd092691d0655a2ffca1108b306cb9446 Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 08:53:50 +0100 Subject: [PATCH 25/31] arm64: dts: rockchip: Remove ethernetX aliases from the SoC dtsi for RK3328 Not all supported boards actually use the RK3328's built-in GMACs, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 and ethernet1 aliases from the RK3328 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. These changes also touch one RK3318-based board dts, because it actually depends on the RK3328 SoC dtsi and enables one of the GMACs. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/0c14f2e354d32f5d45c718ce16643553ca72f6a5.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 1 + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 -- 9 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts index 1deef53a4c94..c7b1862fca6a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts @@ -9,6 +9,7 @@ compatible = "zkmagic,a95x-z2", "rockchip,rk3318"; aliases { + ethernet0 = &gmac2phy; mmc0 = &sdmmc; mmc1 = &sdio; mmc2 = &emmc; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts index 40bf808642b9..824183e515da 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts @@ -9,6 +9,7 @@ compatible = "azw,beelink-a1", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; mmc0 = &sdmmc; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts index ff6b466e0e07..1eef5504445f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts @@ -11,6 +11,7 @@ compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2phy; mmc0 = &sdmmc; mmc1 = &sdio; mmc2 = &emmc; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts index 1445b879ac7a..a4399da7d8b1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts @@ -14,6 +14,7 @@ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; ethernet1 = &rtl8153; mmc0 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts index dc83d74045a3..f20662929c77 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts @@ -15,6 +15,7 @@ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; ethernet1 = &rtl8153; mmc0 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts index 5d5d9574088c..414897a57e75 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts @@ -11,6 +11,7 @@ compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; mmc0 = &sdmmc; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts index 018a3a5075c7..07f00af19aaf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts @@ -21,6 +21,8 @@ compatible = "radxa,rockpi-e", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; + ethernet1 = &gmac2phy; mmc0 = &sdmmc; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index 0a27fa5271f5..229fe9da9c2d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -11,6 +11,7 @@ compatible = "pine64,rock64", "rockchip,rk3328"; aliases { + ethernet0 = &gmac2io; mmc0 = &sdmmc; mmc1 = &emmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 8e0f686d8faa..56e1d0581648 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -31,8 +31,6 @@ i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; - ethernet0 = &gmac2io; - ethernet1 = &gmac2phy; }; cpus { From b110e4cc44c9c59600397a4c042c3e419edf05f1 Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 08:53:51 +0100 Subject: [PATCH 26/31] arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for PX30 Not all supported boards actually use the PX30's built-in (G)MAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/0d9da8959b4f567622676c34b5feb74c49489554.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi | 1 + arch/arm64/boot/dts/rockchip/px30-evb.dts | 1 + arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 1 + arch/arm64/boot/dts/rockchip/px30.dtsi | 1 - 4 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi index 3429e124d95a..5b4e22385165 100644 --- a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi @@ -7,6 +7,7 @@ / { aliases { + ethernet0 = &gmac; mmc1 = &sdmmc; mmc2 = &sdio; }; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts index c1bbd555f5f5..0a90a88fc664 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts @@ -14,6 +14,7 @@ compatible = "rockchip,px30-evb", "rockchip,px30"; aliases { + ethernet0 = &gmac; mmc0 = &sdmmc; mmc1 = &sdio; mmc2 = &emmc; diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index de0a1f2af983..e0a8880f7fcb 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -13,6 +13,7 @@ compatible = "tsd,px30-ringneck-haikou", "rockchip,px30"; aliases { + ethernet0 = &gmac; mmc2 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 42ce78beb413..d0905515399b 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -20,7 +20,6 @@ #size-cells = <2>; aliases { - ethernet0 = &gmac; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; From 36d9b3ae708e865cdab95692db5a24c5d975383d Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 09:01:39 +0100 Subject: [PATCH 27/31] arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3566 boards Add ethernet0 alias to the board dts files for a few supported RK3566 boards that had it missing. Also, remove the ethernet0 alias from one RK3566 SoM dtsi file, which doesn't enable the GMAC, and add the ethernet0 alias back to the dependent board dts files, which actually enable the GMAC. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/d2a272e0ae0fff0adfab8bb0238243b11d348799.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts | 1 + arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts | 1 + arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi | 1 - 6 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts index 1b1c67d5b1ef..3ae24e39450a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts @@ -14,6 +14,7 @@ compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566"; aliases { + ethernet0 = &gmac1; mmc1 = &sdmmc0; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts index 938092fce186..63eea27293fe 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts @@ -12,6 +12,7 @@ compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566"; aliases { + ethernet0 = &gmac1; mmc0 = &sdmmc0; mmc1 = &sdhci; mmc2 = &sdmmc1; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts index 4e49bebf548b..fdbf1c783242 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts @@ -13,6 +13,10 @@ model = "PINE64 RK3566 SOQuartz on Blade carrier board"; compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566"; + aliases { + ethernet0 = &gmac1; + }; + /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */ vcc3v0_sd: vcc3v0-sd-regulator { compatible = "regulator-fixed"; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts index cddf6cd2fecb..6ed3fa4aee34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts @@ -8,6 +8,10 @@ model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board"; compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566"; + aliases { + ethernet0 = &gmac1; + }; + /* labeled +12v in schematic */ vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts index 2208dbfb7f0a..f2095dfa4eaf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts @@ -8,6 +8,10 @@ model = "PINE64 RK3566 SOQuartz on Model A carrier board"; compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566"; + aliases { + ethernet0 = &gmac1; + }; + /* labeled DCIN_12V in schematic */ vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi index 63bae36b8f7e..bfb7b952f4c5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi @@ -12,7 +12,6 @@ compatible = "pine64,soquartz", "rockchip,rk3566"; aliases { - ethernet0 = &gmac1; mmc0 = &sdmmc0; mmc1 = &sdhci; mmc2 = &sdmmc1; From b0140a1b3b1deeb1af557a275eeae99e7f40763f Mon Sep 17 00:00:00 2001 From: Dragan Simic Date: Tue, 12 Dec 2023 09:01:40 +0100 Subject: [PATCH 28/31] arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3588(S) boards Add ethernet0 alias to the board dts files for a few supported RK3588 and RK3588S boards that had it missing. Signed-off-by: Dragan Simic Link: https://lore.kernel.org/r/9af2026bf8a5538aff627381289cb06f2fab4263.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 1 + 4 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index bc11e2fdc54f..ac7c677b0fb9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -16,6 +16,7 @@ compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588"; aliases { + ethernet0 = &gmac0; mmc0 = &sdhci; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts index c7cd57609bc2..87a0abf95f7d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts @@ -17,6 +17,7 @@ compatible = "pine64,quartzpro64", "rockchip,rk3588"; aliases { + ethernet0 = &gmac0; mmc0 = &sdhci; mmc1 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts index 139131838cb6..c63fb3aff137 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts @@ -13,6 +13,7 @@ compatible = "xunlong,orangepi-5", "rockchip,rk3588s"; aliases { + ethernet0 = &gmac1; mmc0 = &sdmmc; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index a1a29bce794b..2002fd0221fa 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -12,6 +12,7 @@ compatible = "radxa,rock-5a", "rockchip,rk3588s"; aliases { + ethernet0 = &gmac1; mmc0 = &sdhci; mmc1 = &sdmmc; }; From 8a64f5f0c692261a3e6686aee89f5c7136f54b89 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 20 Nov 2023 17:01:29 -0600 Subject: [PATCH 29/31] dt-bindings: arm: rockchip: Add Anbernic RG351V The Anbernic RG351V is a portable gaming console from Anbernic with the RK3326 SoC. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231120230131.57705-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index da13cd665fc2..ee92f0535f27 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -30,9 +30,11 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 - - description: Anbernic RG351M + - description: Anbernic RK3326 Handheld Gaming Console items: - - const: anbernic,rg351m + - enum: + - anbernic,rg351m + - anbernic,rg351v - const: rockchip,rk3326 - description: Anbernic RG353P From 9e63209d2099b89d5148379f879c9cd5841599dd Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 20 Nov 2023 17:01:30 -0600 Subject: [PATCH 30/31] arm64: dts: rockchip: Split RG351M from Odroid Go Advance Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid Go Advance, has no ADC joysticks, no GPIO buttons (except for volume on the RG351V), a PWM vibrator that interferes with an Odroid regulator, and different LEDs. Split the RG351M into a DTSI file that can then be imported into the DTS files for the RG351M and a new RG351V. Signed-off-by: Chris Morgan Link: https://lore.kernel.org/r/20231120230131.57705-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- .../dts/rockchip/rk3326-anbernic-rg351m.dts | 18 +- .../dts/rockchip/rk3326-anbernic-rg351m.dtsi | 478 ++++++++++++++++++ 2 files changed, 480 insertions(+), 16 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts index ce318e05f0a6..f4d20f29c1b4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts @@ -6,30 +6,16 @@ */ /dts-v1/; -#include "rk3326-odroid-go.dtsi" +#include "rk3326-anbernic-rg351m.dtsi" / { model = "Anbernic RG351M"; compatible = "anbernic,rg351m", "rockchip,rk3326"; - - vibrator { - compatible = "pwm-vibrator"; - pwms = <&pwm0 0 1000000 0>; - pwm-names = "enable"; - }; }; -/delete-node/ &builtin_gamepad; -/delete-node/ &vcc_host; /* conflicts with pwm vibration motor */ - &internal_display { compatible = "elida,kd35t133"; iovcc-supply = <&vcc_lcd>; + rotation = <270>; vdd-supply = <&vcc_lcd>; }; - -&pwm0 { - status = "okay"; -}; - -/delete-node/ &rk817_charger; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi new file mode 100644 index 000000000000..b6d041dbed94 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi @@ -0,0 +1,478 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Hardkernel Co., Ltd + * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH + * Copyright (c) 2022 Maya Matuszczyk + */ + +/dts-v1/; +#include +#include +#include +#include +#include "rk3326.dtsi" + +/ { + aliases { + mmc0 = &sdmmc; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_bl>; + pwms = <&pwm1 0 25000 0>; + }; + + /* + * LED is a tri-state. Driven high it is red, driven low it is + * green, and not driven at all (pin set to input) it is amber. + * Additionally, there is a 2nd LED that is not controllable + * that is on (red) when plugged in to power. + */ + gpio_led: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin>; + + red_green_led: led-0 { + color = ; + gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_CHARGING; + }; + }; + + rk817-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rk817_int"; + simple-audio-card,format = "i2s"; + simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Speaker"; + simple-audio-card,routing = + "MICL", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Speaker", "SPKO"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_2ch>; + }; + }; + + vccsys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v8_sys"; + regulator-always-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + }; + + vibrator { + compatible = "pwm-vibrator"; + pwms = <&pwm0 0 1000000 0>; + pwm-names = "enable"; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&cru { + assigned-clocks = <&cru PLL_NPLL>, + <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, + <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, + <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>; + + assigned-clock-rates = <1188000000>, + <200000000>, <200000000>, + <150000000>, <150000000>, + <100000000>, <200000000>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dsi { + status = "okay"; + + ports { + mipi_out: port@1 { + reg = <1>; + + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + internal_display: panel@0 { + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; + +&dsi_dphy { + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-falling-time-ns = <16>; + i2c-scl-rising-time-ns = <280>; + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + #clock-cells = <1>; + clock-names = "mclk"; + clock-output-names = "rk808-clkout1", "xin32k"; + clocks = <&cru SCLK_I2S1_OUT>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>; + pinctrl-names = "default"; + #sound-dai-cells = <0>; + wakeup-source; + + vcc1-supply = <&vccsys>; + vcc2-supply = <&vccsys>; + vcc3-supply = <&vccsys>; + vcc4-supply = <&vccsys>; + vcc5-supply = <&vccsys>; + vcc6-supply = <&vccsys>; + vcc7-supply = <&vccsys>; + vcc8-supply = <&vccsys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1150000>; + regulator-min-microvolt = <950000>; + regulator-name = "vdd_logic"; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1350000>; + regulator-min-microvolt = <950000>; + regulator-name = "vdd_arm"; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_3v3"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_1v0: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <1000000>; + regulator-name = "vdd_1v0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v3_pmu: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_bl: LDO_REG7 { + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_bl"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_lcd: LDO_REG8 { + regulator-max-microvolt = <2800000>; + regulator-min-microvolt = <2800000>; + regulator-name = "vcc_lcd"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc_wifi: LDO_REG9 { + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + usb_midu: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5400000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_midu"; + }; + }; + + rk817_codec: codec { + rockchip,mic-in-differential; + }; + }; +}; + +&i2s1_2ch { + status = "okay"; +}; + +&io_domains { + vccio1-supply = <&vcc_3v3>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v3>; + vccio4-supply = <&vcc_3v3>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc { + cap-sd-highspeed; + card-detect-delay = <200>; + cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sfc { + #address-cells = <1>; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; + pinctrl-names = "default"; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <1>; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + status = "okay"; + }; + + u2phy_otg: otg-port { + status = "disabled"; + }; +}; + +&usb20_otg { + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m1_xfer>; + pinctrl-names = "default"; + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&pinctrl { + headphone { + hp_det: hp-det { + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + leds { + led_pin: led-pin { + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + dc_det: dc-det { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pmic_int: pmic-int { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + soc_slppin_gpio: soc_slppin_gpio { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; + }; + + soc_slppin_rst: soc_slppin_rst { + rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; + }; + + soc_slppin_slp: soc_slppin_slp { + rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; + }; + }; +}; From 8174dff9e583f7791dacf6d8ce034eb18ec2b292 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 20 Nov 2023 17:01:31 -0600 Subject: [PATCH 31/31] arm64: dts: rockchip: Add Anbernic RG351V Add support for the Anbernic RG351V, which is a handheld gaming console from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single analog joystick with several face buttons, two USB C ports, and internal WiFi over USB. All hardware has been tested as working except for the battery, which will require further modification to the mainline rk817 battery driver before it can be used (the device was built without a shunt resistor, and as such the battery cannot measure current; only voltage). Signed-off-by: Chris Morgan Link: https://lore.kernel.org/r/20231120230131.57705-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3326-anbernic-rg351v.dts | 44 +++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 41276ca535de..600c420bc550 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351m.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351v.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2-v11.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts new file mode 100644 index 000000000000..c79f7a7b38cb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include "rk3326-anbernic-rg351m.dtsi" + +/ { + model = "Anbernic RG351V"; + compatible = "anbernic,rg351v", "rockchip,rk3326"; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + + button-vol-down { + gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = ; + }; + + button-vol-up { + gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = ; + }; + }; +}; + +&internal_display { + compatible = "anbernic,rg351v-panel", "newvision,nv3051d"; + vdd-supply = <&vcc_lcd>; +}; + +&io_domains { + vccio1-supply = <&vccio_sd>; +}; + +&vcc_sd { + regulator-max-microvolt = <3000000>; + regulator-min-microvolt = <1800000>; +}; + +&vccio_sd { + regulator-max-microvolt = <1800000>; +};