panic, x86: Fix re-entrance problem due to panic on NMI
If panic on NMI happens just after panic() on the same CPU, panic() is recursively called. Kernel stalls, as a result, after failing to acquire panic_lock. To avoid this problem, don't call panic() in NMI context if we've already entered panic(). For that, introduce nmi_panic() macro to reduce code duplication. In the case of panic on NMI, don't return from NMI handlers if another CPU already panicked. Signed-off-by: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> Acked-by: Michal Hocko <mhocko@suse.com> Cc: Aaron Tomlin <atomlin@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Baoquan He <bhe@redhat.com> Cc: Chris Metcalf <cmetcalf@ezchip.com> Cc: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: Don Zickus <dzickus@redhat.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Gobinda Charan Maji <gobinda.cemk07@gmail.com> Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Javi Merino <javi.merino@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: kexec@lists.infradead.org Cc: linux-doc@vger.kernel.org Cc: lkml <linux-kernel@vger.kernel.org> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: Michal Nazarewicz <mina86@mina86.com> Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Seth Jennings <sjenning@redhat.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ulrich Obergfell <uobergfe@redhat.com> Cc: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Vivek Goyal <vgoyal@redhat.com> Link: http://lkml.kernel.org/r/20151210014626.25437.13302.stgit@softrs [ Cleanup comments, fixup formatting. ] Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -231,7 +231,7 @@ pci_serr_error(unsigned char reason, struct pt_regs *regs)
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#endif
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if (panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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nmi_panic("NMI: Not continuing");
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pr_emerg("Dazed and confused, but trying to continue\n");
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@ -255,8 +255,16 @@ io_check_error(unsigned char reason, struct pt_regs *regs)
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reason, smp_processor_id());
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show_regs(regs);
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if (panic_on_io_nmi)
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panic("NMI IOCK error: Not continuing");
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if (panic_on_io_nmi) {
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nmi_panic("NMI IOCK error: Not continuing");
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/*
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* If we end up here, it means we have received an NMI while
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* processing panic(). Simply return without delaying and
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* re-enabling NMIs.
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*/
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return;
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}
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/* Re-enable the IOCK line, wait for a few seconds */
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reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK;
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@ -297,7 +305,7 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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pr_emerg("Do you have a strange power saving mode enabled?\n");
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if (unknown_nmi_panic || panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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nmi_panic("NMI: Not continuing");
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pr_emerg("Dazed and confused, but trying to continue\n");
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}
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@ -445,6 +445,26 @@ extern int sysctl_panic_on_stackoverflow;
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extern bool crash_kexec_post_notifiers;
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/*
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* panic_cpu is used for synchronizing panic() and crash_kexec() execution. It
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* holds a CPU number which is executing panic() currently. A value of
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* PANIC_CPU_INVALID means no CPU has entered panic() or crash_kexec().
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*/
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extern atomic_t panic_cpu;
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#define PANIC_CPU_INVALID -1
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/*
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* A variant of panic() called from NMI context. We return if we've already
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* panicked on this CPU.
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*/
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#define nmi_panic(fmt, ...) \
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do { \
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int cpu = raw_smp_processor_id(); \
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\
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if (atomic_cmpxchg(&panic_cpu, PANIC_CPU_INVALID, cpu) != cpu) \
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panic(fmt, ##__VA_ARGS__); \
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} while (0)
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/*
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* Only to be used by arch init code. If the user over-wrote the default
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* CONFIG_PANIC_TIMEOUT, honor it.
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@ -61,6 +61,8 @@ void __weak panic_smp_self_stop(void)
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cpu_relax();
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}
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atomic_t panic_cpu = ATOMIC_INIT(PANIC_CPU_INVALID);
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/**
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* panic - halt the system
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* @fmt: The text string to print
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@ -71,17 +73,17 @@ void __weak panic_smp_self_stop(void)
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*/
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void panic(const char *fmt, ...)
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{
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static DEFINE_SPINLOCK(panic_lock);
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static char buf[1024];
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va_list args;
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long i, i_next = 0;
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int state = 0;
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int old_cpu, this_cpu;
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/*
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* Disable local interrupts. This will prevent panic_smp_self_stop
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* from deadlocking the first cpu that invokes the panic, since
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* there is nothing to prevent an interrupt handler (that runs
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* after the panic_lock is acquired) from invoking panic again.
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* after setting panic_cpu) from invoking panic() again.
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*/
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local_irq_disable();
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@ -94,8 +96,16 @@ void panic(const char *fmt, ...)
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* multiple parallel invocations of panic, all other CPUs either
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* stop themself or will wait until they are stopped by the 1st CPU
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* with smp_send_stop().
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*
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* `old_cpu == PANIC_CPU_INVALID' means this is the 1st CPU which
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* comes here, so go ahead.
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* `old_cpu == this_cpu' means we came from nmi_panic() which sets
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* panic_cpu to this CPU. In this case, this is also the 1st CPU.
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*/
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if (!spin_trylock(&panic_lock))
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this_cpu = raw_smp_processor_id();
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old_cpu = atomic_cmpxchg(&panic_cpu, PANIC_CPU_INVALID, this_cpu);
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if (old_cpu != PANIC_CPU_INVALID && old_cpu != this_cpu)
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panic_smp_self_stop();
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console_verbose();
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@ -351,7 +351,7 @@ static void watchdog_overflow_callback(struct perf_event *event,
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trigger_allbutself_cpu_backtrace();
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if (hardlockup_panic)
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panic("Hard LOCKUP");
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nmi_panic("Hard LOCKUP");
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__this_cpu_write(hard_watchdog_warn, true);
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return;
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