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PCI/MSI: Use msi_desc::msi_index

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The usage of msi_desc::pci::entry_nr is confusing at best. It's the index
into the MSI[X] descriptor table.

Use msi_desc::msi_index which is shared between all MSI incarnations
instead of having a PCI specific storage for no value.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20211210221814.602911509@linutronix.de
This commit is contained in:
Thomas Gleixner 2021-12-10 23:19:18 +01:00
parent 0f18095871
commit 173ffad79d
6 changed files with 13 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/powerpc/platforms/pseries/msi.c
View File

@ -332,7 +332,7 @@ static int check_msix_entries(struct pci_dev *pdev)
expected = 0;
for_each_pci_msi_entry(entry, pdev) {
if (entry->pci.msi_attrib.entry_nr != expected) {
if (entry->msi_index != expected) {
pr_debug("rtas_msi: bad MSI-X entries.\n");
return -EINVAL;
}
@ -579,7 +579,7 @@ static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
int hwirq;
int i, ret;
hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->pci.msi_attrib.entry_nr);
hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->msi_index);
if (hwirq < 0) {
dev_err(&pdev->dev, "Failed to query HW IRQ: %d\n", hwirq);
return hwirq;

2
arch/x86/pci/xen.c
View File

@ -306,7 +306,7 @@ static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return -EINVAL;
map_irq.table_base = pci_resource_start(dev, bir);
map_irq.entry_nr = msidesc->pci.msi_attrib.entry_nr;
map_irq.entry_nr = msidesc->msi_index;
}
ret = -EINVAL;

2
drivers/pci/msi/irqdomain.c
View File

@ -57,7 +57,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc)
{
struct pci_dev *dev = msi_desc_to_pci_dev(desc);
return (irq_hw_number_t)desc->pci.msi_attrib.entry_nr |
return (irq_hw_number_t)desc->msi_index |
pci_dev_id(dev) << 11 |
(pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
}

20
drivers/pci/msi/msi.c
View File

@ -44,7 +44,7 @@ static inline void pci_msi_unmask(struct msi_desc *desc, u32 mask)
static inline void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
{
return desc->pci.mask_base + desc->pci.msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE;
}
/*
@ -394,13 +394,10 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
if (dev->dev_flags & PCI_DEV_FLAGS_HAS_MSI_MASKING)
control |= PCI_MSI_FLAGS_MASKBIT;
entry->pci.msi_attrib.is_msix = 0;
entry->pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
entry->pci.msi_attrib.is_virtual = 0;
entry->pci.msi_attrib.entry_nr = 0;
entry->pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
entry->pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&
!!(control & PCI_MSI_FLAGS_MASKBIT);
entry->pci.msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
entry->pci.msi_attrib.default_irq = dev->irq;
entry->pci.msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
entry->pci.msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
@ -542,12 +539,11 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
entry->pci.msi_attrib.is_64 = 1;
if (entries)
entry->pci.msi_attrib.entry_nr = entries[i].entry;
entry->msi_index = entries[i].entry;
else
entry->pci.msi_attrib.entry_nr = i;
entry->msi_index = i;
entry->pci.msi_attrib.is_virtual =
entry->pci.msi_attrib.entry_nr >= vec_count;
entry->pci.msi_attrib.is_virtual = entry->msi_index >= vec_count;
entry->pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&
!entry->pci.msi_attrib.is_virtual;
@ -1088,7 +1084,7 @@ int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
struct msi_desc *entry;
for_each_pci_msi_entry(entry, dev) {
if (entry->pci.msi_attrib.entry_nr == nr)
if (entry->msi_index == nr)
return entry->irq;
}
WARN_ON_ONCE(1);
@ -1127,7 +1123,7 @@ const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)
struct msi_desc *entry;
for_each_pci_msi_entry(entry, dev) {
if (entry->pci.msi_attrib.entry_nr == nr)
if (entry->msi_index == nr)
return &entry->affinity->mask;
}
WARN_ON_ONCE(1);

2
drivers/pci/xen-pcifront.c
View File

@ -263,7 +263,7 @@ static int pci_frontend_enable_msix(struct pci_dev *dev,
i = 0;
for_each_pci_msi_entry(entry, dev) {
op.msix_entries[i].entry = entry->pci.msi_attrib.entry_nr;
op.msix_entries[i].entry = entry->msi_index;
/* Vector is useless at this point. */
op.msix_entries[i].vector = -1;
i++;

2
include/linux/msi.h
View File

@ -80,7 +80,6 @@ typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
* @multi_cap: [PCI MSI/X] log2 num of messages supported
* @can_mask: [PCI MSI/X] Masking supported?
* @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
* @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
* @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
* @mask_pos: [PCI MSI] Mask register position
* @mask_base: [PCI MSI-X] Mask register base address
@ -97,7 +96,6 @@ struct pci_msi_desc {
u8 can_mask : 1;
u8 is_64 : 1;
u8 is_virtual : 1;
u16 entry_nr;
unsigned default_irq;
} msi_attrib;
union {